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RT9206PS 参数 Datasheet PDF下载

RT9206PS图片预览
型号: RT9206PS
PDF下载: 下载PDF文件 查看货源
内容描述: 高效率,同步降压型带双线性控制器 [High Efficiency, Synchronous Buck with Dual Linear Controllers]
分类和应用: 控制器
文件页数/大小: 21 页 / 337 K
品牌: RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
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RT9206  
V
V
Boost Component Selection  
DD  
SS  
The booststrap gate drive circuit is used to drive high side  
N-channel MOSFET. The boost capacitor should be a good  
quality and can operate in high frequency. The value of  
boost capacitor depends on the total gate charge (Q g) to  
V
H
OUT  
turn on the MOSFETs. Assuming steady state operation,  
the following equation can be used to calculate the  
capacitance value to achieve the targeted ripple voltage  
PGOOD  
T
VR  
DVBOOT  
.
T
QHg  
SS  
(F)  
CBOOT =  
T
ΔVBOOT  
PGOOD  
Figure 4. The soft-stat timing diagram of RT9206  
The capacitor in the range of 0.1uF to 1uF is generally  
adequate for most applications.  
For the example of CSS = 1mF, VIN = 12V, VOUT = 5V, then  
The VINT pin bypass capacitor CINT needs to charge the  
boost capacitor, to drive the lowside MOSFET, and to power  
the RT9206. CINT should locate near VINT andGND pins  
with short and wide traces. Generally, a 4.7uF high  
frequency ceramic capacitor is recommended.  
TVR = 57ms, TSS = 133ms and TPGOOD = 640ms.  
Shutdown  
The power stage can be shutdown by pulling soft-start pin  
below 0.7V. During shutdown, both of high side MOSFET  
(S1) and low side MOSFET (S2) are turned off.  
Feedback Compensation  
The RT9206 is a voltage mode controller. The control loop  
is a single voltage feedback loop including a trans-  
conductance error amplifier and a PWM comparator.  
Setting the switching frequency  
The switching frequency can be set by a resistor (RRT)  
connecting between RT and GND pins. Equation (16)  
describes the relationship of RRT and switching frequency.  
As RT open the normally operated frequency is 200kHz.  
To achieve fast transient response and accurate output  
regulation, appropriate feedback compensation is  
necessary. The goal of the compensation network is to  
provide a closed loop transfer function with the highest  
0dB crossing frequency and adequate phase margin.  
Generally, the phase margin in a range of 45° ~ 60° is  
desirable. Figure 4 shows the simplified diagram of  
synchronous buck converter and control loop.  
62´ 108  
fS - 200´ 103  
RRT =  
(W)  
(16)  
R
RT  
Connecting Between  
RT and GND Pins  
f (kHz) (kW)  
R
RT  
S
250  
120  
300  
350  
400  
450  
500  
550  
600  
55  
37.5  
30.6  
24.4  
22.5  
19.3  
16.8  
www.richtek.com  
16  
DS9206-11 March 2007