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RT9259APS 参数 Datasheet PDF下载

RT9259APS图片预览
型号: RT9259APS
PDF下载: 下载PDF文件 查看货源
内容描述: 12V同步降压PWM DC -DC和线性电源控制器 [12V Synchronous Buck PWM DC-DC and Linear Power Controller]
分类和应用: 控制器
文件页数/大小: 14 页 / 244 K
品牌: RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
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RT9259A
If MOSFET with R
DS(ON)
= 16mΩ is used, the OCP
threshold current is about 25A. Once OCP is triggered,
the RT9259A enters hiccup mode and re-soft starts again.
The RT9259A shuts down after 4 time OCP hiccups.
A well-designed compensator regulates the output voltage
to the reference voltage V
REF
with fast transient response
and good stability.
In order to achieve fast transient response and accurate
output regulation, an adequate compensator design is
necessary. The goal of the compensation network is to
provide adequate phase margin (greater than 45 degrees)
and the highest 0dB crossing frequency. It is also
recommended to manipulate loop frequency response that
its gain crosses over 0dB at a slope of
−20dB/dec.
V
IN
Inductor Current
(20A/Div)
ΔV
OSC
OSC
PWM
Comparator
-
+
Driver
L
Driver
PHASE
C
OUT
ESR
Z
FB
COMP
-
EA
+
REF
Z
IN
V
OUT
Time (2.5ms/Div)
Figure 6. Shorted then Start Up
I
L
(20A/Div)
C2
Z
FB
R2
C3
Z
IN
R3
R1
V
OUT
LGATE
(5V/Div)
UGATE
(5V/Div)
C1
COMP
-
EA
+
FB
REF
Time (5μs/Div)
Figure 7. Shorted then Start Up (Extended Figure 3)
Feedback Compensation
The RT9259A is a voltage mode controller. The control
loop is a single voltage feedback path including a
compensator and modulator as shown Figure 8. The
modulator consists of the PWM comparator and power
stage. The PWM comparator compares error amplifier EA
output (COMP) with oscillator (OSC) sawtooth wave to
provide a pulse-width modulated (PWM) with an amplitude
of V
IN
at the PHASE node. The PWM wave is smoothed
by the output filter L
OUT
and C
OUT
. The output voltage (V
OUT
)
is sensed and fed to the inverting input of the error amplifier.
Figure 8. Closed Loop
1) Modulator Frequency Equations
The modulator transfer function is the small-signal transfer
function of V
OUT
/V
COMP
(output voltage over the error
amplifier output. This transfer function is dominated by a
DC gain, a double pole, and a zero as shown in Figure 10.
The DC gain of the modulator is the input voltage (V
IN
)
divided by the peak to peak oscillator voltage V
OSC
. The
output LC filter introduces a double pole, 40dB/decade
gain slope above its corner resonant frequency, and a total
phase lag of 180 degrees. The resonant frequency of the
LC filter expressed as :
f
LC
=
1
2
π
L
OUT
×
C
OUT
www.richtek.com
11
DS9259A-02 March 2007