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R5421N151F-TR 参数 Datasheet PDF下载

R5421N151F-TR图片预览
型号: R5421N151F-TR
PDF下载: 下载PDF文件 查看货源
内容描述: 的锂离子电池保护 [Li-lon BATTERY PROTECTOR]
分类和应用: 电源电路电池电源管理电路光电二极管
文件页数/大小: 19 页 / 148 K
品牌: RICOH [ RICOH ELECTRONICS DEVICES DIVISION ]
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s
OPERATION
q
VD1 / Over-Charge Detector in the 'C' version
The VD1 monitors V
DD
pin voltage. When the V
DD
voltage crosses over-charge detector threshold V
DET1
from a low value to
a value higher than the V
DET1
, the VD1 can sense a over-charging and an external charge control Nch-MOS-FET turns to
“OFF” with C
OUT
pin being at “Low” level.
There can be two cases to reset the VD1 making the C
OUT
pin level to “High” again after detecting over-charge. Resetting
the VD1 can make charging system allowable to resumption of charging process.
The first case is in such conditions that a time when the V
DD
voltage is coming down to a level lower than “V
REL1
”.
While in the second case, connecting a kind of loading to V
DD
after disconnecting a charger from the battery pack can make
the VD1 resetting when the V
DD
level is in between “V
DET1
” and “V
REL1”
.
After detecting over-charge with the V
DD
voltage of higher than V
DET1
, connecting system load to the battery pack makes
load current allowable through parasitic diode of external charge control FET.
The C
OUT
level would be High when the V
DD
level is coming down to a level below the V
DET1
by continuous drawing of load
current.
An output delay time for over-charge detection can be set by external capacitor C3 connecting between the V
SS
pin and Ct
pin. The external capacitor can make a delay time from a moment detecting over-charge to a time output a signal which
enables charge control FET turn to “OFF”.
When the V
DD
level is going up to a higher level than V
DET1
if the V
DD
voltage would be back to a level lower than the V
DET1
within a time period of the output delay time, VD1 would not output a signal for turning “OFF” of charge control FET.
The output delay time can be calculated as below:
tV
DET1
[sec] = (C3[F]
×
(V
DD
[V]-0.7) / (0.48
×
10
-6
)
Note:Topt=25°C V
DD
value should be after over-charge detection.
A level shifter incorporated in a buffer driver for the C
OUT
pin makes the “Low” level of C
OUT
pin to the V - pin voltage and
the “High” level of C
OUT
pin is set to V
DD
voltage with CMOS buffer.
q
VD2 / Over-Discharge Detector
The VD2 is monitoring a V
DD
pin voltage. When the V
DD
voltage crosses the over-discharge detector threshold V
DET2
from a
high value to a value lower than the V
DET2
, the VD2 can sense an over-discharging and the external discharge control Nch
MOS FET turns to “OFF” with the D
OUT
pin being at “Low” level.
To reset the VD2 with the D
OUT
pin level being “H” again after detecting over-discharge it is necessary to connect a charger
to the battery pack for R5421NxxxC. When the V
DD
voltage stays under over- discharge detector threshold V
DET2
charge
current can flow through parasitic diode of external discharge control MOS FET, then after the V
DD
voltage comes up to a
value larger than V
DET2,
D
OUT
becomes "H" and discharging process would be able to advance through ON state MOS FET
for discharge control.
Connecting a charger to the battery pack makes the D
OUT
level being “H” instantaneously when the V
DD
voltage is higher
than V
DET2
.
Besides, for R5421NxxxF, when a cell voltage reaches equal or more than over-discharge released voltage, or V
REL2
, over-
discharge condition can be also released
When a cell voltage equals to zero, connecting charger to the battery pack makes the system allowable to charge with higher
charge voltage than Vst, 1.2V Max.
An output delay time for the over-discharge detection is fixed internally, tV
DET2
=10ms typ. at V
DD
=2.4V. When the V
DD
level
is going down to a lower level than V
DET2
if the V
DD
voltage would be back to a level higher than the V
DET2
within a time
period of the output delay time, VD2 would not output a signal for turning “OFF” of discharge control FET.
After detection of an over-discharge by VD2, supply current would be reduced to typically 0.3µA(for R5421NxxxC) or
1.0µA(for R5421NxxxF) at V
DD
=2.0V and into standby, only the charger detector is operating.
The output type of D
OUT
pin is CMOS having “H” level of V
DD
and “L” level of V
SS
.
Rev.1.11
-9-