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RV5C387A
Preliminary
7.Jun.99
I
2
C-Bus Real-Time Clock ICs
with Voltage Monitoring Function
1. OUTLINE
The RV5C387A is a CMOS real-time clock IC connected to the CPU by two signal lines, SCL and SDA, and
configured to perform serial transmission of time and calendar data to the CPU. The periodic interrupt circuit
is configured to generate interrupt signals with six selectable interrupts ranging from 0.5 seconds to 1 month.
The 2 alarm interrupt circuits generate interrupt signals at preset times. As the oscillation circuit is driven
under constant voltage, fluctuation of the oscillator frequency due to supply voltage is small, and the time
keeping current is small (TYP. 0.35
µA
at 3 volts). The oscillation halt sensing circuit can be used to judge
the validity of internal data in such events as power-on; The supply voltage monitoring circuit is configured to
record a drop in supply voltage below two selectable supply voltage monitoring threshold settings. The 32-
kHz clock output function (Nch open-drain output) is intended to output sub-clock pulses for the external
microcomputer. The 32-kHz clock output can be disabled by certain register settings. The oscillation
adjustment circuit is intended to adjust time counts with high precision by correcting deviations in the
oscillation frequency of the crystal oscillator. This model comes in an ultra-compact SSOP10G (Pin Pitch
0.5mm, Height1.2mm, 4.0mm×2.9mm).
2. FEATURES
•
Timekeeping supply voltage ranging from 1.45 to 5.5V
•
Low power consumption
0.35µA TYP (0.8µA MAX) at VDD=3V
•
Only two signal lines (SCL and SDA) required for connection to the CPU.
2
( I C-Bus Interface, 400kHz at VDD≥2.5V, address7bit)
•
Time counters (counting hours, minutes, and seconds) and calendar counters (counting years, months, days,
and weeks) (in BCD format)
•
1900/2000 identification bit for Year 2000 compliance
•
Interrupt circuit configured to generate interrupt signals (with interrupts ranging from 0.5 seconds to 1 month)
to the CPU and provided with an interrupt flag and an interrupt halt
•
2 alarm interrupt circuits (Alarm_W for week, hour, and minute alarm settings and Alarm_D for hour and
minute alarm settings)
•
32-kHz clock circuit (N-ch open-drain output)
Designed to disable 32-kHz clock output in response to a command from the host computer.
•
Oscillation halt sensing circuit which can be used to judge the validity of internal data
•
Supply voltage monitoring circuit with two supply voltage monitoring threshold settings
•
Automatic identification of leap years up to the year 2099
•
Selectable 12-hour and 24-hour mode settings
•
Built-in oscillation stabilization capacitors (CG and CD)
•
High precision oscillation adjustment circuit
•
CMOS process
•
Ultra-compact SSOP10G
*) I
2
C-Bus is a trademark of PHILIPS N.V.
Purchase of I2C-Bus components of Ricoh Company, LTD. conveys a license under the Philips I
2
C Patent
Rights to use these components in an I
2
C system, provided that the system comforms to the I
2
C standard
Specification as definded by Philips.
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RICOH [ RICOH ELECTRONICS DEVICES DIVISION ]
