K6X1008T2D Family
AC OPERATING CONDITIONS
TEST CONDITIONS
( Test Load and Input/Output Reference)
Input pulse level: 0.4 to 2.2V
Input rising and falling time: 5ns
Input and output reference voltage:1.5V
Output load(see right): C
L
=100pF+1TTL
C
L
=30pF+1TTL
C
L
1)
CMOS SRAM
1. Including scope and jig capacitance
AC CHARACTERISTICS
(V
CC
=2.7~3.6V, Commercial product:T
A
=0 to 70°C, Industrial product:T
A
=-40 to 85°C, Automotive product:T
A
=-40 to 125°C
)
Speed Bins
Parameter List
Symbol
55ns
1
)
Min
Read Cycle Time
Address Access Time
Chip Select to Output
Output Enable to Valid Output
Read
Chip Select to Low-Z Output
Output Enable to Low-Z Output
Chip Disable to High-Z Output
Output Disable to High-Z Output
Output Hold from Address Change
Write Cycle Time
Chip Select to End of Write
Address Set-up Time
Address Valid to End of Write
Write
Write Pulse Width
Write Recovery Time
Write to Output High-Z
Data to Write Time Overlap
Data Hold from Write Time
End Write to Output Low-Z
t
RC
t
AA
t
CO
t
OE
t
LZ
t
OLZ
t
HZ
t
OHZ
t
OH
t
WC
t
CW
t
AS
t
AW
t
WP
t
WR
t
WHZ
t
DW
t
DH
t
OW
55
-
-
-
10
5
0
0
10
55
45
0
45
40
0
0
20
0
5
Max
-
55
55
25
-
-
25
25
-
-
-
-
-
-
-
25
-
-
-
Min
70
-
-
-
10
5
0
0
10
70
60
0
60
50
0
0
25
0
5
70ns
Max
-
70
70
35
-
-
25
25
-
-
-
-
-
-
-
25
-
-
-
Min
85
-
-
-
10
5
0
0
15
85
70
0
70
60
0
0
35
0
5
85ns
Max
-
85
85
40
-
-
25
25
-
-
-
-
-
-
-
30
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Units
1. Voltage range is 3.0V~3.6V for commercial and industrial product.
DATA RETENTION CHARACTERISTICS
Item
Vcc for data retention
Data retention current
Symbol
V
DR
I
DR
CS
1
≥Vcc-0.2V
1)
K6X1008T2D-B
Vcc=3.0V, CS
1
≥Vcc-0.2V
1)
K6X1008T2D-F
K6X1008T2D-Q
Data retention set-up time
Recovery time
t
SDR
t
RDR
See data retention waveform
0
5
-
-
Test Condition
Min
2.0
-
-
Typ
-
-
-
Max
3.6
6
6
10
-
-
Unit
V
µA
µA
µA
ms
1. CS
1
≥Vcc-0.2V
,
CS
2
≥V
CC
-0.2V, or CS
2
≤0.2V
5
Revision 1.0
September 2003
SAMSUNG [ SAMSUNG SEMICONDUCTOR ]
