KM684000C Family
512Kx8 bit Low Power CMOS Static RAM
FEATURES
•
Process Technology: TFT
•
Organization: 512Kx8
•
Power Supply Voltage: 4.5~5.5V
•
Low Data Retention Voltage: 2V(Min)
•
Three state output and TTL Compatible
•
Package Type: 32-DIP-600, 32-SOP-525,
32-TSOP2-400F/R
CMOS SRAM
GENERAL DESCRIPTION
The KM684000C families are fabricated by SAMSUNG′s
advanced CMOS process technology. The families support
various operating temperature ranges and various package
types for user flexibility of system design. The family also
support low data retention voltage for battery back-up oper-
ation with low data retention current.
PRODUCT FAMILY
Power Dissipation
Product Family
Operating Temperature
Vcc Range
Speed
Standby
(I
SB1
, Max)
80µA
4.5~5.5V
Inderstrial (-40~85°C)
55
1)
/70ns
20µA
100µA
30µA
55mA
32-SOP
32-TSOP2-F/R
Operating
(I
CC2
, Max)
PKG Type
KM684000CL
KM684000CL-L
KM684000CLI
KM684000CLI-L
Commercial (0~70°C)
32-DIP,32-SOP
32-TSOP2-F/R
1. The parameter is measured with 50pF test load.
PIN DESCRIPTION
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
FUNCTIONAL BLOCK DIAGRAM
VCC
A15
A17
WE
A13
A8
A9
A11
OE
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
1
2
3
4
5
6
VCC
A15
A17
WE
A13
A8
A9
A11
OE
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
VSS
I/O
1
I/O
8
Clk gen.
Precharge circuit.
32-DIP
32-SOP
32-TSOP2
(Forward)
26
25
24
23
22
21
20
19
18
17
32-TSOP2
(Reverse)
7
8
9
10
11
12
13
14
15
16
Row
select
Memory array
1024 rows
512×8 columns
Data
cont
I/O Circuit
Column select
Data
cont
Pin Name
WE
CS
OE
A
0
~A
18
I/O
1
~I/O
8
Vcc
Vss
Function
Write Enable Input
Chip Select Input
Output Enable Input
Address Inputs
Data Inputs/Outputs
Power
Ground
CS
WE
OE
Control
logic
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to change products and specifications without notice.
2
Revision 1.0
April 1999
SAMSUNG [ SAMSUNG SEMICONDUCTOR ]
