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KT8555J 参数 Datasheet PDF下载

KT8555J图片预览
型号: KT8555J
PDF下载: 下载PDF文件 查看货源
内容描述: 时隙分配电路 [TIME SLOT ASSIGNMENT CIRCUIT]
分类和应用: 数字传输控制器电信集成电路电信电路
文件页数/大小: 6 页 / 99 K
品牌: SAMSUNG [ SAMSUNG SEMICONDUCTOR ]
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KT8555
TIME SLOT ASSIGNMENT CIRCUIT
INTRODUCTION
20-CERDIP
The KT8555 is a per channel Time Slot Assignment Circuit
(TSAC) that produces 8-bit receive and transmit time slots for
four 1 CHIP CODEC.
Each frame synchronization pulse may be independently
assigned to a time slot in a frame of up to 84 time slots.
FEATURES
l
l
l
l
l
l
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Single, 5V operation
Low power consumption: 5mW
Controls four 1 CHIP CODEC
Independent transmit and receive frame syncs
enables
channel unidirectional mode
Up to 64 time slots per frame
Compatible with KT8554/7 CODECs
TTL and CMOS compatible
ORDERING INFORMATION
Device
KT8555J
Package
20-CERDIP
Operating Temperature
- 20°C ~ + 125°C
PIN CONFIGURATION
FS
X
1
FS
R
1
FS
X
0
FS
R
0
TS
X
D
C
CLK
C
CS
MODE
1
2
3
4
5
6
7
8
9
20 V
CC
19 FS
R
2
18 FS
X
2
17 FS
R
3
16 FS
X
3
15 CH0
14 CH1
13 RSY
C
/CH2
12 XSY
C
11 BCLK
KT8555
GND 10
Fig. 1