LC89210 参数 Datasheet PDF下载

LC89210

AC Electrical Characteristics

Dual-Port RAM Host Timing

Parameter

Address and control setup time

SDTACK acknowledge

Data setup time

Address and control hold time

Data hold time

SDTACK hold time

Write enable low state

Access inhibition high state

Read enable low state

Read data access

SINTR clear delay

Data valid to tristate

Number

1

2

3

4

5

6

7

8

9

10

11

12

Conditions

min

5

typ

max

Unit

ns

20

10

0

5

0

45

70*

45

35

50

15

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

Note:

*

The minimum delay of 70 ns is the time from the rising edge of NWRITE to the next falling edge on either NREAD or NWRITE.

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