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SC1175CSW 参数 Datasheet PDF下载

SC1175CSW图片预览
型号: SC1175CSW
PDF下载: 下载PDF文件 查看货源
内容描述: 低功耗双同步DC / DC控制器均流电路 [Low Power Dual Synchronous DC/DC Controller With Current Sharing Circuitry]
分类和应用: 控制器
文件页数/大小: 20 页 / 347 K
品牌: SEMTECH [ SEMTECH CORPORATION ]
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SC1175  
POWER MANAGEMENT  
Theory of Operation (Cont.)  
The formula is:  
ing is not 1:1. The Master and Slave channels still  
have their own current limits, identical to the  
independent channel case.  
VOUT + .1  
R (pull up) = 100 X 762 X .5 −  
VSLAVE IN  
Power Good  
The controller provides a power good signal. This is  
an open collector output, which is pulled low if the  
output voltage is outside of the power good window.  
100W being the value of the resistors connecting the  
pins 2 and 3 to the two output sense resistors.  
The estimated voltage drop across the MOSFETs is  
0.1V.  
Positive values go to pin 3, negative to pin 2.  
If R (pull-up) = +20KW then place a 20WK resistor on  
pin 3.  
If R (pull-up) = -20KW then place a 20KW on pin 2.  
Now that the offset resistor has been fixed, we need  
to set up the maximum current for each channel.  
Selection of RSENSE 1 for the master channel:  
(mohms)  
RSENSE 1 = 72mV / I max master  
Selection of RSENSE 2 for the slave channel: (mohms)  
RSENSE 1 = 48mV / I max master  
The errors will be minimized if the power compo-  
nents have been sized proportionately to the maxi-  
mum currents.  
Soft Start/Enable  
The Soft Start/Enable (SS/ENA) pin serves several  
functions. If held below the Soft Start Enable thresh-  
old, both channels are inhibited. DH1 and DH2 will be  
low, turning off the top FETs. Between the Soft Start  
Enable threshold and the Soft Start End threshold,  
the duty cycle is allowed to increase. At the Soft Start  
End threshold, maximum duty cycle is reached. In  
practical applications the error amplifier will be  
controlling the duty cycle before the Soft Start End  
threshold is reached. To avoid boost problems during  
startup in current share mode, both channels start  
up in asynchronous mode, and the bottom FET body  
diode is used for recirculating current during the FET  
off time. When the SS/ENA pin reaches the Soft Start  
Transition threshold, the channels begin operating in  
synchronous mode for improved efficiency. The soft  
start pin sources approximately 25uA and soft start  
timing can be set by selection of an appropriate soft  
start capacitor value.  
Independent Channels  
Calculation of the two current limiting resistors.  
There is no need for an offset resistor in the indepen-  
dent channels mode, only the two sense resistors  
are used:  
Selection of RSENSE 1 for the channel 1: (mohms)  
RSENSE 1 = 72mV / I max ch 1  
SENSE RESISTOR SELECTION  
Selection of RSENSE 2 for the channel 2: (mohms)  
Current Sharing Mode  
R
SENSE 1 = 72mV / I max ch 2  
Calculation of the three programming resistors to  
achieve sharing.  
Three resistors will determine the current sharing  
load line.  
First the offset resistor will ensure that the load line  
crosses the origin (0 Amp on each channel) for  
sharing at light current. A pull up resistor from the 5V  
bias (VCC of the chip) will be used. For low duty cycle  
on the slave channel (below 50%), the pull up will be  
on pin 3. For high duty cycle on the slave channel  
(above 50%), the pull up will be on pin 2.  
www.semtech.com  
ã 2000 Semtech Corp.  
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