PROGRAMMABLE SYNCHRONOUS DC/DC
CONVERTER, DUAL LOW DROPOUT
REGULATOR CONTROLLER
August 25, 1998
4) The Output Capacitor(s) (Cout) should be located
as close to the load as possible, fast transient load
currents are supplied by Cout only, and connections
between Cout and the load must be short, wide cop-
per areas to minimize inductance and resistance.
5) The SC1182/3 is best placed over a quiet ground
plane area, avoid pulse currents in the Cin, Q1, Q2
loop flowing in this area. PGNDH and PGNDL should
be returned to the ground plane close to the package.
The AGND pin should be connected to the ground
side of (one of) the output capacitor(s). If this is not
possible, the AGND pin may be connected to the
ground path between the Output Capacitor(s) and the
Cin, Q1, Q2 loop. Under no circumstances should
AGND be returned to a ground inside the Cin, Q1, Q2
loop.
6) Vcc for the SC1182/3 should be supplied from the
SC1182/3
5V supply through a 10Ω resistor, the Vcc pin should
be decoupled directly to AGND by a 0.1µF ceramic
capacitor, trace lengths should be as short as possi-
ble.
7) The Current Sense resistor and the divider across
it should form as small a loop as possible, the traces
running back to CS+ and CS- on the SC1182/3
should run parallel and close to each other. The
0.1µF capacitor should be mounted as close to the
CS+ and CS- pins as possible.
8) Ideally, the grounds for the two LDO sections
should be returned to the ground side of (one of) the
output capacitor(s).
5V
+
Vout
+
Currents in various parts of the power section
9
© 1998 SEMTECH CORP.
652 MITCHELL ROAD NEWBURY PARK CA 91320
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