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SC1480ITSTR 参数 Datasheet PDF下载

SC1480ITSTR图片预览
型号: SC1480ITSTR
PDF下载: 下载PDF文件 查看货源
内容描述: DDR内存电源控制器 [DDR Memory Power Supply Controller]
分类和应用: 稳压器开关式稳压器或控制器电源电路开关式控制器光电二极管双倍数据速率
文件页数/大小: 22 页 / 534 K
品牌: SEMTECH [ SEMTECH CORPORATION ]
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SC1480  
POWER MANAGEMENT  
Applications Information (Cont.)  
Power Good Output  
The high-side gate driver is equipped with turn-on soft  
switching to reduce gate drive power dissipation. When  
a DH turn-on is initiated the pull-up resistance is 10 Ohms.  
This limits the peak high-side gate current before the  
MOSFET is conducting current. The peak gate current  
plays a large role in gate driver switching losses. When  
the high-side MOSFET begins conducting, and LX starts  
to rise, the pull-up resistance on DH changes to 2 Ohms.  
Power good is an open-drain output and requires a pull-  
up resistor. When the output voltage is 10% above or  
below its set voltage, PGOOD gets pulled low. It is held  
low until the output voltage returns to within 10% of the  
output set voltage. PGOOD is also held low during start-  
up and will not be allowed to transition high until the out-  
put reaches 90% of its set voltage. There is a slight delay  
built into the PGOOD circuit to prevent false transitions.  
Output Overvoltage Protection  
Design Procedure  
When the output exceeds 10% of the its set voltage the  
low-side MOSFET is latched on. It stays latched and the  
SMPS is off until the enable input or POR is toggled. There  
is a slight delay built into the OV protection circuit to pre-  
vent false transitions.  
Prior to any design of a switch mode power supply (SMPS)  
for notebook computers, determination of input voltage,  
load current, switching frequency and inductor ripple cur-  
rent must be specified.  
Input Voltage Range  
Output Undervoltage Protection  
The maximum input voltage (VINMAX) is determined by the  
highest AC adaptor voltage. The minimum input voltage  
(VINMIN) is determined by the lowest battery voltage after  
accounting for voltage drops due to connectors, fuses  
and battery selector switches.  
When the output is 20% below its set voltage the output  
is latched in a tristated condition, and the SMPS is off  
until the enable input or POR is toggled. There is a slight  
delay built into the UV protection circuit to prevent false  
transitions.  
Maximum Load Current  
POR, UVLO and Softstart  
There are two values of load current to consider. Con-  
tinuous load current and peak load current. Continuous  
load current has more to do with thermal stresses and  
therefore drives the selection of input capacitors,  
MOSFETs and commutation diodes. Whereas, peak load  
current determines instantaneous component stresses  
and filtering requirements such as, inductor saturation,  
output capacitors and design of the current limit circuit.  
An internal power-on reset (POR) occurs when VCCA ex-  
ceeds 3V, resetting the fault latch and soft-start counter,  
and preparing the PWM for switching. VCCA undervoltage  
lockout (UVLO) circuitry inhibits switching and forces the  
DL gate driver high until VCCA rises above 4.1V. At this  
time the circuit will come out of UVLO and begin switch-  
ing, and the softstart circuit being enabled, will progres-  
sively limit the output current over a predetermined time  
period. The ramp occurs in four steps: 25%, 50%, 75%  
and 100%, thereby limiting the slew rate of the output  
voltage. There is 100mV of hysteresis built into the UVLO  
circuit and when the VCCA falls to 4.0V the output driv-  
ers are shutdown and tristated.  
Switching Frequency  
Switching frequency determines the trade-off between  
size and efficiency. Increased frequency increases the  
switching losses in the MOSFETs, since losses are a func-  
tion of VIN2. Knowing the maximum input voltage  
and budget for MOSFET switches usually dictates where  
the design ends up.  
MOSFET Gate Drivers  
The DH and DL drivers are optimized for driving moder-  
ate-sized high-side, and larger low-side power MOSFETs.  
An adaptive dead-time circuit monitors the DL output and  
prevents the high-side MOSFET from turning on, until DL  
is fully off, and conversely, monitors the DH output and  
prevents the low-side MOSFET from turning on until DH  
is fully off. Be sure there is low resistance and low induc-  
tance between the DH and DL outputs to the gate of  
each MOSFET.  
Inductor Ripple Current  
Low inductor values create higher ripple current, result-  
ing in smaller size, but are less efficient because of the  
high AC currents flowing through the inductor. Higher in-  
ductor values do reduce the ripple current and are more  
efficient, but are larger and more costly.  
2006 Semtech Corp.  
9
www.semtech.com