Complete DDR Power Solution
POWER MANAGEMENT
Description
The SC2615 is a fully integrated,
Three in One,
Linear
DDR power solution providing power for the VDDQ and
the VTT rails. The SC2615 completely adheres to the
ACPI sleep state power requirements per Intel
R
motherboard specifications. A linear regulator controller
provides the high current of the VDDQ during S0, via an
external Power MOSFET, while an internal
1.8A (min)
sink/
source regulator supplies the termination voltage.
In addition to these two blocks, an Internal LDO provides
VDDQ power during S3, capable of sourcing
650 mA.
The SC2615 uses Intel
R
defined Latched BF_CUT signal
which is also used to drive the external Blocking MOSFET.
Additional logic, two UVLOs and three thermal shutdown
circuits assure reliability of this single chip DDR power
solution. A Power Good Output indicates the rails are in
regulation.
A Soft Start/Enable pin assures proper startup and allows
external shutdown control. The MLP package provides
excellent thermal impedance while keeping a small
footprint.
SC2615
Features
Single chip solution adheres to ACPI sleep state
requirements using BF_CUT
UVLO on 3.3V and 12V
Internal S3 state LDO for VDDQ supplies 650 mA
Dual thermal shutdown
Fast transient response
Internal VTT regulator Sinks and Sources 1.8A
(Min)
Power good output
18 pin MLP package
Applications
DDR power solution for Intel
R
motherboard
applications
High speed data line termination
Graphic cards
Disk drives
Typical Application Circuit
12V
5V
5V STBY
Cin
1uF
16
4
BF_CUT
PWRGD
BF_CUT
PWRGD
11
10
18
17
0.1uF
12
3
2
SC2615
12VCC
5VSBY
BF_CUT
PGOOD
SS/EN
NC
HSINKPAD
AGND
LGND
VTTSNS
3.3VCC
TG
NC
NC
VDDQSTBY
VDDQIN
FB
VTT
VTT
9
15
14
13
7
8
1
6
5
VTT
Cout
VDDQ
19
Revision 2, April 2003
1
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