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SRDA3.3-4TB 参数 Datasheet PDF下载

SRDA3.3-4TB图片预览
型号: SRDA3.3-4TB
PDF下载: 下载PDF文件 查看货源
内容描述: RailClamp低电容TVS二极管阵列 [RailClamp Low Capacitance TVS Diode Array]
分类和应用: 二极管电视
文件页数/大小: 10 页 / 256 K
品牌: SEMTECH [ SEMTECH CORPORATION ]
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PROTECTION PRODUCTS
Description
RailClamps are surge rated diode arrays designed to
protect high speed data interfaces. The SR series has
been specifically designed to protect sensitive compo-
nents which are connected to data and transmission
lines from overvoltage caused by
ESD
(electrostatic
discharge),
EFT
(electrical fast transients), and
light-
ning.
The unique design of the SRDA series devices incorpo-
rates surge rated, low capacitance steering diodes and
a TVS diode in a single package. During transient
conditions, the steering diodes direct the transient to
either the positive side of the power supply line or to
ground. The internal TVS diode prevents over-voltage
on the power line, protecting any downstream compo-
nents.
The low capacitance array configuration allows the user
to protect two high-speed data or transmission lines.
The low inductance construction minimizes voltage
overshoot during high current surges.
RailClamp
Ò
Low Capacitance TVS Diode Array
Features
u
Transient protection for high-speed data lines to
IEC 61000-4-2 (ESD) 15kV (air), 8kV (contact)
IEC 61000-4-4 (EFT) 40A (5/50ns)
IEC 61000-4-5 (Lightning) 24A (8/20µs)
Array of surge rated diodes with internal TVS diode
Protects four I/O lines & power supply line
Low capacitance (<15pF) for high-speed interfaces
Low operating & clamping voltages
Solid-state technology
SRDA3.3-4 THRU SRDA12-4
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Mechanical Characteristics
JEDEC SO-8 package
UL 497B listed
Molding compound flammability rating: UL 94V-0
Marking : Part number, date code, logo
Packaging : Tube or Tape and Reel per EIA 481
Applications
USB Power & Data Line Protection
T1/E1 secondary IC Side Protection
T3/E3 secondary IC Side Protection
HDSL, IDSL secondary IC Side Protection
Video Line Protection
Microcontroller Input Protection
Base stations
I
2
C Bus Protection
Circuit Diagram
Schematic & PIN Configuration
I/O
REF1
1
8
REF 2
REF 1
I/O 1
I/O 2
I/O 3
I/O 4
2
7
I/O
REF 1
3
6
I/O
REF2
I/O
4
5
REF 2
S0-8 (Top View)
Revision 9/2000
1
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