APPLICATION NOTES
Driving Capacitive Loads
The SGM2358 can directly drive 250pF in unity-gain without
oscillation. The unity-gain follower (buffer) is the most sensitive
configuration to capacitive loading. Direct capacitive loading
reduces the phase margin of amplifiers and this results in ringing
or even oscillation. Applications that require greater capacitive
drive capability should use an isolation resistor between the
output and the capacitive load like the circuit in Figure 1. The
isolation resistor R
ISO
and the load capacitor C
L
form a zero to
increase stability. The bigger the R
ISO
resistor value, the more
stable V
OUT
will be. Note that this method results in a loss of gain
accuracy because R
ISO
forms a voltage divider with the R
LOAD
.
Power-Supply Bypassing and Layout
The SGM2358 operates from either a single +3V to +5.5V
supply or dual ±1.5V to ±2.75V supplies. For single-supply
operation, bypass the power supply V
DD
with a 0.1µF ceramic
capacitor which should be placed close to the V
DD
pin. For
dual-supply operation, both the V
DD
and the V
SS
supplies should
be bypassed to ground with separate 0.1µF ceramic capacitors.
2.2µF tantalum capacitor can be added for better performance.
V
DD
V
DD
10µF
10µF
0.1µF
0.1µF
R
ISO
�½
SGM2358
V
IN
C
L
V
OUT
Vn
Vn
�½
SGM2358
Vp
V
OUT
�½
SGM2358
Vp
10µF
V
OUT
Figure 1. Indirectly Driving Heavy Capacitive Load
An improvement circuit is shown in Figure 2, It provides DC
accuracy as well as AC stability. R
F
provides the DC accuracy by
connecting the inverting signal with the output, C
F
and R
Iso
serve
to counteract the loss of phase margin by feeding the high
frequency component of the output signal back to the amplifier’s
inverting input, thereby preserving phase margin in the overall
feedback loop.
V
SS
(GND)
0.1µF
V
SS
Figure 3. Amplifier with Bypass Capacitors
C
F
R
F
R
ISO
�½
SGM2358
V
IN
C
L
R
L
V
OUT
Figure 2. Indirectly Driving Heavy Capacitive Load with DC
Accuracy
For no-buffer configuration, there are two others ways to
increase the phase margin: (a) by increasing the amplifier’s gain
or (b) by placing a capacitor in parallel with the feedback resistor
to counteract the parasitic capacitance associated with inverting
node.
7
SGM2358