欢迎访问ic37.com |
会员登录 免费注册
发布采购

SGM8542XMS/TR 参数 Datasheet PDF下载

SGM8542XMS/TR图片预览
型号: SGM8542XMS/TR
PDF下载: 下载PDF文件 查看货源
内容描述: 为1.1MHz , 42レA,轨到轨输入/输出CMOS运算放大器 [1.1MHz, 42レA, Rail-to-Rail I/O CMOS Operational Amplifier]
分类和应用: 运算放大器
文件页数/大小: 14 页 / 618 K
品牌: SGMICRO [ Shengbang Microelectronics Co, Ltd ]
 浏览型号SGM8542XMS/TR的Datasheet PDF文件第3页浏览型号SGM8542XMS/TR的Datasheet PDF文件第4页浏览型号SGM8542XMS/TR的Datasheet PDF文件第5页浏览型号SGM8542XMS/TR的Datasheet PDF文件第6页浏览型号SGM8542XMS/TR的Datasheet PDF文件第8页浏览型号SGM8542XMS/TR的Datasheet PDF文件第9页浏览型号SGM8542XMS/TR的Datasheet PDF文件第10页浏览型号SGM8542XMS/TR的Datasheet PDF文件第11页  
APPLICATION NOTES
Driving Capacitive Loads
The SGM854X can directly drive 250pF in unity-gain without
oscillation. The unity-gain follower (buffer) is the most sensitive
configuration to capacitive loading. Direct capacitive loading
reduces the phase margin of amplifiers and this results in ringing
or even oscillation. Applications that require greater capacitive
drive capability should use an isolation resistor between the
output and the capacitive load like the circuit in Figure 1. The
isolation resistor R
ISO
and the load capacitor C
L
form a zero to
increase stability. The bigger the R
ISO
resistor value, the more
stable V
OUT
will be. Note that this method results in a loss of gain
accuracy because R
ISO
forms a voltage divider with the R
LOAD
.
Power-Supply Bypassing and Layout
The SGM854X family operates from either a single +2.5V to
+5.5V supply or dual ±1.25V to ±2.75V supplies. For
single-supply operation, bypass the power supply V
DD
with a
0.1µF ceramic capacitor which should be placed close to the
V
DD
pin. For dual-supply operation, both the V
DD
and the V
SS
supplies should be bypassed to ground with separate 0.1µF
ceramic capacitors. 2.2µF tantalum capacitor can be added for
better performance.
V
DD
V
DD
10µF
10µF
0.1µF
0.1µF
R
ISO
SGM8541
V
OUT
C
L
Vn
Vn
SGM8541
V
IN
V
OUT
SGM8541
V
OUT
10µF
Vp
Vp
Figure 1. Indirectly Driving Heavy Capacitive Load
An improvement circuit is shown in Figure 2, It provides DC
accuracy as well as AC stability. R
F
provides the DC accuracy by
connecting the inverting signal with the output, C
F
and R
Iso
serve
to counteract the loss of phase margin by feeding the high
frequency component of the output signal back to the amplifier’s
inverting input, thereby preserving phase margin in the overall
feedback loop.
V
SS
(GND)
0.1µF
V
SS
Figure 3. Amplifier with Bypass Capacitors
C
F
R
F
R
ISO
SGM8541
V
OUT
C
L
R
L
V
IN
Figure 2. Indirectly Driving Heavy Capacitive Load with DC
Accuracy
For no-buffer configuration, there are two others ways to
increase the phase margin: (a) by increasing the amplifier’s gain
or (b) by placing a capacitor in parallel with the feedback resistor
to counteract the parasitic capacitance associated with inverting
node.
SGM8541/8542/8544