LH28F320S3TD-L10
inactive, (multi) word/byte write are suspended, or
the device is in deep power-down mode. The other
3 alternate configurations are all pulse mode for
use as a system interrupt.
The access time is 100 ns (t
AVQV
) at the V
CC
supply voltage range of 3.0 to 3.6 V over the
temperature range, 0 to +70°C. At 2.7 to 3.6 V
V
CC
, the access time is 120 ns.
The Automatic Power Saving (APS) feature
substantially reduces active current when the
device is in static mode (addresses not switching).
In APS mode, the typical I
CCR
current is 3 mA at
2.7 V and 3.3 V V
CC
.
When either BE
0
# or BE
1L
#, BE
1H
# and RP# pins
are at V
CC
, the I
CC
CMOS standby mode is
enabled. When the RP# pin is at GND, deep
power-down mode is enabled which minimizes
power consumption and provides write protection
during reset. A reset time (t
PHQV
) is required from
RP# switching high until outputs are valid. Likewise,
the device has a wake time (t
PHEL
) from RP#-high
until writes to the CUI are recognized. With RP# at
GND, the WSM is reset and the status register is
cleared.
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