LH28F400SU-NC
FEATURES
56-PIN TSOP
4M (512K × 8, 256K × 16)
Flash Memory
TOP VIEW
•
User-Configurable x8 or x16 Operation
•
5 V Write/Erase Operation (5 V V
PP
)
– No Requirement for DC/DC Converter
to Write/Erase
NC
NC
A
15
A
14
A
13
A
12
A
11
A
10
A
9
A
8
NC
NC
WE
RP
NC
NC
V
PP
RY/BY
NC
A
17
A
7
A
6
A
5
A
4
A
3
A
2
A
1
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
NC
A
16
BYTE
GND
DQ
15
/A
-1
DQ
7
DQ
14
DQ
6
DQ
13
DQ
5
DQ
12
DQ
4
V
CC
V
CC
DQ
11
DQ
3
DQ
10
DQ
2
DQ
9
DQ
1
DQ
8
DQ
0
OE
GND
CE
A
0
NC
NC
•
60 ns Maximum Access Time
(V
CC
= 5.0 V ± 0.25 V)
•
80ns Maximum Access Time
(V
CC
= 5.0 V ± 0.5 V)
•
32 Independently Lockable Blocks (16K)
•
100,000 Erase Cycles per Block
•
Automated Byte Write/Block Erase
– Command User Interface
– Status Register
– RY
/BY
»
Status Output
»
•
System Performance Enhancement
– Erase Suspend for Read
– Two-Byte Write
– Full Chip Erase
•
Data Protection
– Hardware Erase/Write Lockout during
Power Transitions
– Software Erase/Write Lockout
•
Independently Lockable for Write/Erase
on Each Block (Lock Block and Protect
Set/Reset)
•
5 µA (Typ.) I
CC
in CMOS Standby
•
0.2 µA (Typ.) Deep Power-Down
•
State-of-the-Art 0.45 µm ETOX™ Flash
Technology
28F400SUT-NC60-1
Figure 1. 56-Pin TSOP Configuration
•
56-Pin, 1.2 mm × 14 mm × 20 mm TSOP
(Type I) Package
•
48-Pin, 1.2 mm × 12 mm × 18 mm TSOP
(Type I) Package
•
44-Pin, 600-mil SOP Package
1
SHARP [ SHARP ELECTRIONIC COMPONENTS ]
