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SE2545A23 参数 Datasheet PDF下载

SE2545A23图片预览
型号: SE2545A23
PDF下载: 下载PDF文件 查看货源
内容描述: 双频802.11n无线网卡前端的初步信息 [Dual Band 802.11n Wireless LAN Front End Preliminary Information]
分类和应用: 无线局域网
文件页数/大小: 2 页 / 101 K
品牌: SIGE [ SIGE SEMICONDUCTOR, INC. ]
 浏览型号SE2545A23的Datasheet PDF文件第2页  
SE2545A23
Dual Band 802.11n Wireless LAN Front End
Preliminary Information
Applications
802.11n, MIMO solutions
IEEE802.11b DSSS WLAN
IEEE802.11g OFDM WLAN
IEEE802.11a OFDM WLAN
Access Points, PCMCIA, PC cards
Product Description
The SE2545A23 is a complete 802.11n WLAN RF
front-end module providing all the functionality of the
power amplifiers, power detector, T/R switch,
diplexers and associated matching. The SE2545A23
provides a complete 2.4 GHz and 5 GHz WLAN
Multiple Input, Multiple Output (MIMO) RF solution
from the output of the transceiver to the antennas in
an ultra compact form factor.
Designed for ease of use, all RF ports are matched to
50
to simplify PCB layout and the interface to the
transceiver RFIC. The SE2545A23 also includes a
transmitter power detector for each band and transmit
chain with 20 dB of dynamic range for each transmit
chain. Each transmit chain has a separate digital
enable control for transmitter power ramp on/off
control. The power ramp rise/fall time is less than 0.5
μsec.
The device also provides a notch filter from 3.2-3.3
GHz and 3.2-3.9 GHz prior to the input of each 2.4
GHz and 5 GHz power amplifiers, respectively.
Features
2 Transmit and 2 receive path architecture
All RF ports matched to 50
Integrated 2.4 GHz PA, 5 GHz PA, TX Filter, T/R
switches and diplexers
Integrated Power Detector for each TX Chain
18 dBm O/P Power, 802.11b, 11 Mbits, ACPR =
32 dBc
18 dBm @ 3.0 % EVM, 802.11g, 54 Mbits
15 dBm @ 3.0 % EVM, 802.11a, 54 Mbits
Single supply voltage: 3.3 V ± 10 %
Lead free and RoHS compliant
Thin lead free plated package, 10 mm x 14 mm x
1.1 mm, MSL 3
Ordering Information
Part No.
SE2545A23
SE2545A23-R
SE2545A23-EK1
Package
48 pin LGA
48 pin LGA
N/A
Remark
Samples
Tape & Reel
Evaluation kit
Functional Block Diagram
PU0a
PU0g
RX0ag
TX0ag
PD0ag
ROg
Diplexor
ROa
T/R
Switch
A0
TOg
Trap
Filter
2.4 GHz
PA
Power Detector
TOa
Trap
Filter
5 GHz
PA
Diplexer
Coupler
T1a
Trap
Filter
5 GHz
PA
Coupler
Power Detector
Diplexer
T1g
Trap
Filter
2.4 GHz
PA
R1a
R1g
Diplexor
T/R
Switch
A1
PU1a
PU1g
PD1ag
RX1ag TX1ag
Figure 1: Functional Block Diagram
218-DST-01
Rev 1.4
May-26-2009
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