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Si825
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REQUENCY
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OMPENSATION
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IMULATOR
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I G I TA L
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O N V E R T E R S
Relevant Devices
This application note applies to the Si8250/1/2 Digital Power Controller and Silicon Laboratories Single-phase POL
Reference Design.
1. Introduction
The Frequency Compensation Simulator (FCS) enables the user to easily design and optimize closed-loop
frequency compensation for buck converters based on the Silicon Labs Si8250 digital power controller. The FCS
simulates both the controller and power stages providing a single simulation of the entire system. The intuitive user
interface generates frequency response gain and phase graphs, and automatically generates filter coefficient
values for the Si8250 in both decimal and hex formats.
2. Features
System compensation design and optimization in a single intuitive simulation environment.
Directly generates compensation loop filter coefficients for the Si8250 digital controller.
Greatly reduces design and system verification time.
3. User Interface
The default FCS GUIs are shown in Figures 1 and 2. The Bode Plot GUI of Figure 1 illustrates the closed-loop
magnitude and phase response for the Si8250-based buck converter. This GUI displays the response plots with
loop bandwidth, and gain and phase margin data in real time, and includes a cursor function to facilitate plot
measurement at any point. The Real Time Compensation data entry GUI shown in Figure 2 consists of multiple
user interfaces, each with its own selection tab (the Setup GUI is shown). The user specifies power stage and
controller parameters using this set of GUIs. (For example: power stage parameters such as output filter L and C
values; Si8250 control parameters such as ADC LSB size and sampling frequency, PWM frequency, etc).
Figure 1. Default Bode Plot GUI
Rev. 0.1 7/06
Copyright © 2006 by Silicon Laboratories
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SILABS [ SILICON LABORATORIES ]
