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C8051F005 参数 Datasheet PDF下载

C8051F005图片预览
型号: C8051F005
PDF下载: 下载PDF文件 查看货源
内容描述: 混合信号32KB ISP功能的Flash MCU系列 [Mixed-Signal 32KB ISP FLASH MCU Family]
分类和应用: 微控制器和处理器
文件页数/大小: 171 页 / 5235 K
品牌: SILABS [ SILICON LABORATORIES ]
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C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
Mixed-Signal 32KB ISP FLASH MCU Family
a
ANALOG PERIPHERALS
-
SAR ADC
12-Bit (C8051F000/1/2, C8051F005/6/7)
10-bit (C8051F010/1/2, C8051F015/6/7)
±1LSB
INL; No Missing Codes
Programmable Throughput up to 100ksps
Up to 8 External Inputs; Programmable as Single-
Ended or Differential
Programmable Amplifier Gain: 16, 8, 4, 2, 1, 0.5
Data Dependent Windowed Interrupt Generator
Built-in Temperature Sensor (± 3°C)
HIGH SPEED 8051
µC
CORE
-
-
-
-
-
-
Pipelined Instruction Architecture; Executes 70% of
Instruction Set in 1 or 2 System Clocks
Up to 25MIPS Throughput with 25MHz Clock
21 Vectored Interrupt Sources
256 Bytes Internal Data RAM (F000/01/02/10/11/12)
2304 Bytes Internal Data RAM (F005/06/07/15/16/17)
32k Bytes FLASH; In-System Programmable in 512 byte
Sectors
4 Byte-Wide Port I/O; All are 5V tolerant
Hardware SMBus
TM
(I2C
TM
Compatible), SPI
TM
, and UART
Serial Ports Available Concurrently
Programmable 16-bit Counter/Timer Array with Five
Capture/Compare Modules
Four General Purpose 16-bit Counter/Timers
Dedicated Watch-Dog Timer
Bi-directional Reset
Internal Programmable Oscillator: 2-to-16MHz
External Oscillator: Crystal, RC,C, or Clock
Can Switch Between Clock Sources on-the-fly; Useful in
Power Saving Modes
Typical Operating Current: 12.5mA @ 25MHz
Multiple Power Saving Sleep and Shutdown Modes
MEMORY
-
-
-
-
-
-
-
-
-
-
Two 12-bit DACs
Two Analog Comparators
Programmable Hysteresis Values
Configurable to Generate Interrupts or Reset
DIGITAL PERIPHERALS
-
-
-
-
-
-
-
-
-
Voltage Reference
2.4V; 15 ppm/°C
Available on External Pin
Precision VDD Monitor/Brown-out Detector
On-Chip Debug Circuitry Facilitates Full Speed, Non-
Intrusive In-System Debug (No Emulator Required!)
Provides Breakpoints, Single Stepping, Watchpoints, Stack
Monitor
Inspect/Modify Memory and Registers
Superior Performance to Emulation Systems Using ICE-
Chips, Target Pods, and Sockets
IEEE1149.1 Compliant Boundary Scan
Low Cost Development Kit
ON-CHIP JTAG DEBUG & BOUNDARY SCAN
CLOCK SOURCES
SUPPLY VOLTAGE ........................2.7V to 3.6V
-
-
64-Pin TQFP, 48-Pin TQFP, 32-Pin LQFP
Temperature Range: –40°C to +85°C
ANALOG PERIPHERALS
TEMP
SENSOR
DIGITAL I/O
SMBus
SPI Bus
UART
CROSSBAR
AMUX
PGA
SAR
VREF
12-Bit
DAC
+
+
-
Timer 1
Timer 2
Timer 3
12-Bit
DAC
-
VOLTAGE
COMPARATORS
HIGH-SPEED CONTROLLER CORE
8051 CPU
CLOCK
DEBUG
JTAG
(25MIPS)
CIRCUIT
CIRCUITRY
32KB
256/2304 B
21
SANITY
ISP FLASH
SRAM
INTERRUPTS CONTROL
Rev. 1.7 11/03
Copyright © 2003 by Silicon Laboratories
Port 3
Port 2
Timer 0
Port 1
ADC
Port 0
PCA