C8051F305
25 MIPS, 2 kB Flash, 11-Pin Mixed-Signal MCU
Analog Peripherals
Comparator
High-Speed 8051 µC Core
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Programmable hysteresis and response time
Configurable to generate interrupts or reset
Low current (0.4 µA)
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Pipelined Instruction architecture; executes 70% of instructions in 1 or 2
system clocks
Up to 25 MIPS throughput with 25 MHz clock
Expanded interrupt handler
256 bytes data RAM
2 kB Flash; in-system programmable in 512 byte sectors (512 bytes are
reserved)
8 port I/O; all are 5 V tolerant
Enhanced Hardware SMBus™ (I2C™ compatible) and UART serial
ports
Programmable 16-bit counter/timer array with three capture/compare
modules, WDT
3 general-purpose 16-bit counter/timers
Dedicated watchdog timer; bidirectional reset
Real-time clock mode using PCA or timer and external clock source
Internal oscillator: 20 MHz nominal
External oscillator: Crystal, RC, C, or Clock (1 or 2 pin modes)
Can switch between clock sources on-the-fly
11-pin MLP (Standard Lead and Lead-free packages)
Lead-free package: C8051F305-GM
Standard package: C8051F305
POR/Brown-Out Detector
On-Chip Debug
On-chip debug circuitry facilitates full speed, non-intrusive in-system
debug (no emulator required)
Provides breakpoints, single stepping, watchpoints
Inspect/modify memory, registers, and stack
Superior performance to emulation systems using ICE-chips, target
pods, and sockets
Typical operating current: 5.8 mA at 25 MHz
11 µA at 32 kHz
Typical stop mode current: <0.1 µA
Memory
Digital Peripherals
Supply Voltage: 2.7 to 3.6 V
Temperature Range: –40 to +85 °C
Clock Sources
Package
Ordering Part Numbers
VDD
GND
Analog/Digital
Power
C2D
Debug HW
Reset
Brown-
Out
RST/C2CK
POR
8
0
5
1
Port 0
Latch
2 kB
FLASH
256 Byte
SRAM
UART
Timer
0, 1, 2 /
RTC
PCA/
WDT
SMBus
X
B
A
R
P
0
D
r
v
P0.0
P0.1
P0.2/XTAL1
P0.3/XTAL2
P0.4/TX
P0.5/RX
P0.6/CNVST
P0.7/C2D
XTAL1
XTAL2
External
Oscillator
Circuit
Internal
Oscillator
System Clock
C
o
SFR Bus
r
e
C2D
CP0
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Small Form Factor
Copyright © 2005 by Silicon Laboratories
4.8.2005
SILABS [ SILICON LABORATORIES ]
