C8051F336/7/8/9
SFR Definition 17.1. PCON: Power Control
Bit
7
6
5
4
3
2
1
STOP
R/W
0
0
IDLE
R/W
0
Name
Type
Reset
GF[5:0]
R/W
0
0
0
0
0
0
SFR Address = 0x87
Bit
Name
Function
7:2
GF[5:0]
General Purpose Flags 5–0.
These are general purpose flags for use under software control.
1
0
STOP
IDLE
Stop Mode Select.
Setting this bit will place the CIP-51 in Stop mode. This bit will always be read as 0.
1: CPU goes into Stop mode (internal oscillator stopped).
IDLE: Idle Mode Select.
Setting this bit will place the CIP-51 in Idle mode. This bit will always be read as 0.
1: CPU goes into Idle mode. (Shuts off clock to CPU, but clock to Timers, Interrupts,
Serial Ports, and Analog Peripherals are still active.)
Rev. 0.2
109
SILICON [ SILICON ]
