C8051F340/1/2/3/4/5/6/7
15.1. Priority Crossbar Decoder
The Priority Crossbar Decoder (Figure 15.3) assigns a priority to each I/O function, starting at the top with
UART0. When a digital resource is selected, the least-significant unassigned Port pin is assigned to that
resource (excluding UART0, which is always at pins 4 and 5). If a Port pin is assigned, the Crossbar skips
that pin when assigning the next selected resource. Additionally, the Crossbar will skip Port pins whose
associated bits in the PnSKIP registers are set. The PnSKIP registers allow software to skip Port pins that
are to be used for analog input, dedicated functions, or GPIO.
Important Note on Crossbar Configuration:
If a Port pin is claimed by a peripheral without use of the
Crossbar, its corresponding PnSKIP bit should be set. This applies to the VREF signal, external oscillator
pins (XTAL1, XTAL2), the ADC’s external conversion start signal (CNVSTR), EMIF control signals, and any
selected ADC or Comparator inputs. The PnSKIP registers may also be used to skip pins to be used as
GPIO. The Crossbar skips selected pins as if they were already assigned, and moves to the next unas-
signed pin. Figure 15.3 shows the Crossbar Decoder priority with no Port pins skipped. Figure 15.4 shows
a Crossbar example with pins P0.2 and P0.3 skipped (P0SKIP = 0x0C).
P0
SF Signals
(32-pin
Package)
SF Signals
(48-pin
Package)
PIN I/O
TX0
RX0
SCK
MISO
MOSI
NSS*
SDA
SCL
CP0
CP0A
CP1
CP1A
SYSCLK
CEX0
CEX1
CEX2
CEX3
CEX4
ECI
T0
T1
TX1**
RX1**
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
P0SKIP[0:7]
Port pin potentially available to peripheral
SF Signals
Special Function Signals are not assigned by the Crossbar. When these signals are
enabled, the Crossbar must be manually configured to skip their corresponding port pins.
P1SKIP[0:7]
P2SKIP[0:7]
P3SKIP[0:7]
**UART1 Only in 48-pin Package
*NSS is only pinned out in 4-wire SPI mode
0
1
2
3
4
5
CNVSTR
XTAL1
XTAL2
VREF
P1
P2
P3
P3.1-P3.7 Unavailable on
32-pin Package
CNVSTR
XTAL1
XTAL2
VREF
ALE
6
7
0
1
2
3
4
5
6
/WR
7
0
/RD
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
Figure 15.3. Crossbar Priority Decoder with No Pins Skipped
Rev. 1.0
153
SILABS [ SILICON LABORATORIES ]
