C8051F340/1/2/3/4/5/6/7
22. Programmable Counter Array (PCA0)
The Programmable Counter Array (PCA0) provides enhanced timer functionality while requiring less CPU
intervention than the standard 8051 counter/timers. The PCA consists of a dedicated 16-bit counter/timer
and five 16-bit capture/compare modules. Each capture/compare module has its own associated I/O line
(CEXn) which is routed through the Crossbar to Port I/O when enabled (See Section “15.1. Priority
Crossbar Decoder” on page 153 for details on configuring the Crossbar). The counter/timer is driven by
a programmable timebase that can select between six sources: system clock, system clock divided by four,
system clock divided by twelve, the external oscillator clock source divided by 8, Timer 0 overflow, or an
external clock signal on the ECI input pin. Each capture/compare module may be configured to operate
independently in one of six modes: Edge-Triggered Capture, Software Timer, High-Speed Output, Fre-
quency Output, 8-Bit PWM, or 16-Bit PWM (each mode is described in Section “22.2. Capture/Compare
Modules” on page 269). The external oscillator clock option is ideal for real-time clock (RTC) functionality,
allowing the PCA to be clocked by a precision external oscillator while the internal oscillator drives the sys-
tem clock. The PCA is configured and controlled through the system controller's Special Function Regis-
ters. The PCA block diagram is shown in Figure 22.1
Important Note: The PCA Module 4 may be used as a watchdog timer (WDT), and is enabled in this mode
following a system reset. Access to certain PCA registers is restricted while WDT mode is enabled. See
Section 22.3 for details.
SYSCLK/12
SYSCLK/4
Timer 0 Overflow
PCA
16-Bit Counter/Timer
CLOCK
MUX
ECI
SYSCLK
External Clock/8
Capture/Compare
Module 0
Capture/Compare
Module 1
Capture/Compare
Module 2
Capture/Compare
Module 3
Capture/Compare
Module 4 / WDT
Crossbar
Port I/O
Figure 22.1. PCA Block Diagram
Rev. 1.0
267
SILICON [ SILICON ]
