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C8051F347-GQ 参数 Datasheet PDF下载

C8051F347-GQ图片预览
型号: C8051F347-GQ
PDF下载: 下载PDF文件 查看货源
内容描述: 全速USB闪存单片机系列 [Full Speed USB Flash MCU Family]
分类和应用: 闪存
文件页数/大小: 288 页 / 3090 K
品牌: SILICON [ SILICON ]
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C8051F340/1/2/3/4/5/6/7  
Table 17.3. Sources for Hardware Changes to SMB0CN  
Bit  
Set by Hardware When:  
A START is generated.  
Cleared by Hardware When:  
A STOP is generated.  
Arbitration is lost.  
MASTER  
START is generated.  
A START is detected.  
SMB0DAT is written before the start of an  
SMBus frame.  
Arbitration is lost.  
TXMODE  
SMB0DAT is not written before the  
start of an SMBus frame.  
Must be cleared by software.  
A START followed by an address byte is  
received.  
A STOP is detected while addressed as a  
slave.  
Arbitration is lost due to a detected STOP.  
A byte has been received and an ACK  
response value is needed.  
STA  
STO  
A pending STOP is generated.  
After each ACK cycle.  
ACKRQ  
A repeated START is detected as a MASTER Each time SI is cleared.  
when STA is low (unwanted repeated START).  
SCL is sensed low while attempting to gener-  
ate a STOP or repeated START condition.  
SDA is sensed low while transmitting a ‘1’  
(excluding ACK bits).  
The incoming ACK value is low (ACKNOWL- The incoming ACK value is high (NOT  
EDGE).  
ARBLOST  
ACK  
ACKNOWLEDGE).  
A START has been generated.  
Lost arbitration.  
Must be cleared by software.  
A byte has been transmitted and an ACK/  
NACK received.  
A byte has been received.  
A START or repeated START followed by a  
slave address + R/W has been received.  
A STOP has been received.  
SI  
Rev. 1.0  
207