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C8051F807-GU 参数 Datasheet PDF下载

C8051F807-GU图片预览
型号: C8051F807-GU
PDF下载: 下载PDF文件 查看货源
内容描述: 混合信号ISP功能的Flash MCU系列 [Mixed Signal ISP Flash MCU Family]
分类和应用: 微控制器和处理器外围集成电路光电二极管时钟
文件页数/大小: 250 页 / 1303 K
品牌: SILABS [ SILICON LABORATORIES ]
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C8051F80x-83x
Figure 4.2. QFN-20 Recommended PCB Land Pattern
Table 4.2. QFN-20 PCB Land Pattern Dimensions
Dimension
C1
C2
E
X1
Min
3.70
3.70
0.50
0.20
0.30
Max
Dimension
X2
Y1
Y2
Min
2.15
0.90
2.15
Max
2.25
1.00
2.25
Notes:
General
1.
All dimensions shown are in millimeters (mm) unless otherwise noted.
2.
Dimensioning and Tolerancing is per the ANSI Y14.5M-1994 specification.
3.
This Land Pattern Design is based on the IPC-7351 guidelines.
Solder Mask Design
4.
All metal pads are to be non-solder mask defined (NSMD). Clearance between the solder
mask and the metal pad is to be 60 µm minimum, all the way around the pad.
Stencil Design
5.
A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be used
to assure good solder paste release.
6.
The stencil thickness should be 0.125 mm (5 mils).
7.
The ratio of stencil aperture to land pad size should be 1:1 for all perimeter pins.
8.
A 2x2 array of 0.95 mm openings on a 1.1 mm pitch should be used for the center pad to
assure the proper paste volume.
Card Assembly
9.
A No-Clean, Type-3 solder paste is recommended.
10.
The recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small
Body Components.
34
Rev. 1.0