C8051F80x-83x
23.1.3. Interfacing Port I/O to 5 V Logic
All Port I/O configured for digital, open-drain operation are capable of interfacing to digital logic operating at
a supply voltage up to 2 V higher than VDD and less than 5.25 V. An external pull-up resistor to the higher
supply voltage is typically required for most systems.
Important Note:
In a multi-voltage interface, the external pull-up resistor should be sized to allow a current
of at least 150 µA to flow into the Port pin when the supply voltage is between (VDD + 0. 6V) and
(VDD + 1.0V). Once the Port pin voltage increases beyond this range, the current flowing into the Port pin
is minimal. Figure 23.3 shows the input current characteristics of port pins driven above VDD. The port pin
requires 150 µA peak overdrive current when its voltage reaches approximately (VDD + 0.7 V).
V
DD
V
test
(V)
V
DD
V
DD
+0.7
I
Vtest
I/O
Cell
I
Vtest
(µA)
+
0
-10
-
V
test
-150
Port I/O Overdrive Test Circuit
Port I/O Overdrive Current vs. Voltage
Figure 23.3. Port I/O Overdrive Current
23.2. Assigning Port I/O Pins to Analog and Digital Functions
Port I/O pins P0.0–P1.7 can be assigned to various analog, digital, and external interrupt functions. The
Port pins assigned to analog functions should be configured for analog I/O, and Port pins assigned to digi-
tal or external interrupt functions should be configured for digital I/O.
23.2.1. Assigning Port I/O Pins to Analog Functions
Port pins selected for
these analog functions should have their corresponding bit in PnSKIP set to 1.
This reserves the pin
for use by the analog function and does not allow it to be claimed by the Crossbar.
Any selected pins
should also have their corresponding bit in the Port Latch set to 1 (Pn.n = 1).
This prevents the low
port I/O drive circuit from pulling the pin low. Table 23.1 shows the potential mapping of Port I/O to each
analog function.
140
Rev. 1.0
SILABS [ SILICON LABORATORIES ]
