C8051F80x-83x
Table 27.1. Timer Settings for Standard Baud Rates
Using The Internal 24.5 MHz Oscillator
Frequency: 24.5 MHz
Target
Baud Rate
(bps)
230400
115200
57600
28800
14400
9600
2400
1200
Baud Rate
% Error
–0.32%
–0.32%
0.15%
–0.32%
0.15%
–0.32%
–0.32%
0.15%
Oscillator Timer Clock
Divide
Source
Factor
106
212
426
848
1704
2544
10176
20448
SYSCLK
SYSCLK
SYSCLK
SYSCLK/4
SYSCLK/12
SYSCLK/12
SYSCLK/48
SYSCLK/48
SCA1–SCA0
(pre-scale
select)
1
XX
2
XX
XX
01
00
00
10
10
T1M
1
Timer 1
Reload
Value (hex)
0xCB
0x96
0x2B
0x96
0xB9
0x96
0x96
0x2B
1
1
1
0
0
0
0
0
SYSCLK from
Notes:
1.
SCA1
–
SCA0 and T1M bit definitions can be found in
.
2.
X = Don’t care.
Internal Osc.
Table 27.2. Timer Settings for Standard Baud Rates
Using an External 22.1184 MHz Oscillator
Frequency: 22.1184 MHz
Target
Baud Rate
(bps)
230400
115200
57600
28800
14400
9600
2400
1200
230400
115200
57600
28800
14400
9600
Baud Rate
% Error
0.00%
0.00%
0.00%
0.00%
0.00%
0.00%
0.00%
0.00%
0.00%
0.00%
0.00%
0.00%
0.00%
0.00%
Oscillator Timer Clock
Divide
Source
Factor
96
192
384
768
1536
2304
9216
18432
96
192
384
768
1536
2304
SYSCLK
SYSCLK
SYSCLK
SYSCLK / 12
SYSCLK / 12
SYSCLK / 12
SYSCLK / 48
SYSCLK / 48
EXTCLK / 8
EXTCLK / 8
EXTCLK / 8
EXTCLK / 8
EXTCLK / 8
EXTCLK / 8
SCA1–SCA0
(pre-scale
select)
1
XX
2
XX
XX
00
00
00
10
10
11
11
11
11
11
11
T1M
1
Timer 1
Reload
Value (hex)
0xD0
0xA0
0x40
0xE0
0xC0
0xA0
0xA0
0x40
0xFA
0xF4
0xE8
0xD0
0xA0
0x70
1
1
1
0
0
0
0
0
0
0
0
0
0
0
SYSCLK from
SYSCLK from
208
Notes:
1.
SCA1
–
SCA0 and T1M bit definitions can be found in
.
2.
X = Don’t care.
Internal Osc.
External Osc.
Rev. 1.0
SILABS [ SILICON LABORATORIES ]
