欢迎访问ic37.com |
会员登录 免费注册
发布采购

C8051F827-GS 参数 Datasheet PDF下载

C8051F827-GS图片预览
型号: C8051F827-GS
PDF下载: 下载PDF文件 查看货源
内容描述: 混合信号ISP功能的Flash MCU系列 [Mixed Signal ISP Flash MCU Family]
分类和应用: 微控制器和处理器外围集成电路光电二极管时钟
文件页数/大小: 250 页 / 1303 K
品牌: SILICON [ SILICON ]
 浏览型号C8051F827-GS的Datasheet PDF文件第236页浏览型号C8051F827-GS的Datasheet PDF文件第237页浏览型号C8051F827-GS的Datasheet PDF文件第238页浏览型号C8051F827-GS的Datasheet PDF文件第239页浏览型号C8051F827-GS的Datasheet PDF文件第241页浏览型号C8051F827-GS的Datasheet PDF文件第242页浏览型号C8051F827-GS的Datasheet PDF文件第243页浏览型号C8051F827-GS的Datasheet PDF文件第244页  
C8051F80x-83x  
SFR Definition 29.3. PCA0PWM: PCA0 PWM Configuration  
Bit  
7
ARSEL  
R/W  
0
6
ECOV  
R/W  
0
5
COVF  
R/W  
0
4
3
EAR16  
R/W  
0
2
1
CLSEL[1:0]  
R/W  
0
Name  
Type  
Reset  
R
0
0
0
0
SFR Address = 0xF7  
Bit  
Name  
Function  
7
ARSEL  
Auto-Reload Register Select.  
This bit selects whether to read and write the normal PCA capture/compare registers  
(PCA0CPn), or the Auto-Reload registers at the same SFR addresses. This function  
is used to define the reload value for 9-bit through 15-bit PWM mode and 16-bit PWM  
mode. In all other modes, the Auto-Reload registers have no function.  
0: Read/Write Capture/Compare Registers at PCA0CPHn and PCA0CPLn.  
1: Read/Write Auto-Reload Registers at PCA0CPHn and PCA0CPLn.  
6
5
ECOV  
COVF  
Cycle Overflow Interrupt Enable.  
This bit sets the masking of the Cycle Overflow Flag (COVF) interrupt.  
0: COVF will not generate PCA interrupts.  
1: A PCA interrupt will be generated when COVF is set.  
Cycle Overflow Flag.  
This bit indicates an overflow of the nth bit (n= 9 through 15) of the main PCA counter  
(PCA0). The specific bit used for this flag depends on the setting of the CLSEL bits.  
The bit can be set by hardware or software, but must be cleared by software.  
0: No overflow has occurred since the last time this bit was cleared.  
1: An overflow has occurred since the last time this bit was cleared.  
4
3
Unused  
EAR16  
Read = 0b; Write = Don’t care.  
16-Bit PWM Auto-Reload Enable.  
This bit controls the Auto-Reload feature in 16-bit PWM mode, which loads the  
PCA0CPn capture/compare registers with the values from the Auto-Reload registers  
at the same SFR addresses on an overflow of the PCA counter (PCA0). This setting  
affects all PCA channels that are configured to use 16-bit PWM mode.  
0: 16-bit PWM mode Auto-Reload is disabled. This default setting is backwards-com-  
patible with the 16-bit PWM mode available on other devices.  
1: 16-bit PWM mode Auto-Reload is enabled.  
2:0 CLSEL[2:0] Cycle Length Select.  
When 16-bit PWM mode is not selected, these bits select the length of the PWM  
cycle, from 8 to 15 bits. This affects all channels configured for PWM which are not  
using 16-bit PWM mode. These bits are ignored for individual channels configured  
to16-bit PWM mode.  
000: 8 bits.  
001: 9 bits.  
010: 10 bits.  
011: 11 bits.  
100: 12 bits.  
101: 13 bits.  
110: 14 bits.  
111: 15 bits.  
240  
Rev. 1.0