C8051F827-GS 参数 Datasheet PDF下载

C8051F80x-83x

8.5. ADC0 Analog Multiplexer

ADC0 on the C8051F800/1/2/3/4/5, C8051F812/3/4/5/6/7, C8051F824/5/6, and C8051F830/1/2 uses an

analog input multiplexer to select the positive input to the ADC. Any of the following may be selected as the

positive input: Port 0 or Port 1 I/O pins, the on-chip temperature sensor, or the positive power supply (V

DD

).

The ADC0 input channel is selected in the ADC0MX register described in SFR Definition 8.9.

ADC0MX

AMX0P4

AMX0P3

AMX0P2

AMX0P1

AMX0P0

P0.0

Note: P1.4-P1.7

are not available

on the 16-pin

packages.

P1.7

Temp

Sensor

AMUX

ADC0

VREG Output

VDD

GND

Figure 8.6. ADC0 Multiplexer Block Diagram

Important Note About ADC0 Input Configuration:

Port pins selected as ADC0 inputs should be config-

ured as analog inputs, and should be skipped by the Digital Crossbar. To configure a Port pin for analog

input, set the corresponding bit in register PnMDIN to 0. To force the Crossbar to skip a Port pin, set the

corresponding bit in register PnSKIP to 1. See Section “23. Port Input/Output” on page 138 for more Port

I/O configuration details.

56

Rev. 1.0