C8051F80x-83x
29.3. Capture/Compare Modules
Each module can be configured to operate independently in one of six operation modes: edge-triggered
capture, software timer, high-speed output, frequency output, 8-bit through 15-bit pulse width modulator, or
16-bit pulse width modulator. Each module has Special Function Registers (SFRs) associated with it in the
CIP-51 system controller. These registers are used to exchange data with a module and configure the
module's mode of operation. Table 29.2 summarizes the bit settings in the PCA0CPMn and PCA0PWM
registers used to select the PCA capture/compare module’s operating mode. Note that all modules set to
use 8-bit through 15-bit PWM mode must use the same cycle length (8–15 bits). Setting the ECCFn bit in a
PCA0CPMn register enables the module's CCFn interrupt.
Table 29.2. PCA0CPM and PCA0PWM Bit Settings for PCA Capture/Compare Modules1,2,3,4,5,6
Operational Mode
PCA0CPMn
PCA0PWM
Bit Number 7 6 5 4 3 2 1 0 7 6 5 4 3 2–0
Capture triggered by positive edge on CEXn
Capture triggered by negative edge on CEXn
Capture triggered by any transition on CEXn
Software Timer
X X 1 0 0 0 0 A 0 X B X X XXX
X X 0 1 0 0 0 A 0 X B X X XXX
X X 1 1 0 0 0 A 0 X B X X XXX
X C 0 0 1 0 0 A 0 X B X X XXX
X C 0 0 1 1 0 A 0 X B X X XXX
X C 0 0 0 1 1 A 0 X B X X XXX
0 C 0 0 E 0 1 A 0 X B X X 000
0 C 0 0 E 0 1 A D X B X X 001
0 C 0 0 E 0 1 A D X B X X 010
0 C 0 0 E 0 1 A D X B X X 011
0 C 0 0 E 0 1 A D X B X X 100
0 C 0 0 E 0 1 A D X B X X 101
0 C 0 0 E 0 1 A D X B X X 110
0 C 0 0 E 0 1 A D X B X X 111
1 C 0 0 E 0 1 A 0 X B X 0 XXX
1 C 0 0 E 0 1 A D X B X 1 XXX
High Speed Output
Frequency Output
7
8-Bit Pulse Width Modulator
7
9-Bit Pulse Width Modulator
7
10-Bit Pulse Width Modulator
7
11-Bit Pulse Width Modulator
7
12-Bit Pulse Width Modulator
7
13-Bit Pulse Width Modulator
7
14-Bit Pulse Width Modulator
7
15-Bit Pulse Width Modulator
16-Bit Pulse Width Modulator
16-Bit Pulse Width Modulator with Auto-Reload
Notes:
1. X = Don’t Care (no functional difference for individual module if 1 or 0).
2. A = Enable interrupts for this module (PCA interrupt triggered on CCFn set to 1).
3. B = Enable 8th through 15th bit overflow interrupt (Depends on setting of CLSEL[2:0]).
4. C = When set to 0, the digital comparator is off. For high speed and frequency output modes, the
associated pin will not toggle. In any of the PWM modes, this generates a 0% duty cycle (output = 0).
5. D = Selects whether the Capture/Compare register (0) or the Auto-Reload register (1) for the associated
channel is accessed via addresses PCA0CPHn and PCA0CPLn.
6. E = When set, a match event will cause the CCFn flag for the associated channel to be set.
7. All modules set to 8-bit through 15-bit PWM mode use the same cycle length setting.
228
Rev. 1.0
SILICON [ SILICON ]
