C8051F50x-F51x
Mixed Signal ISP Flash MCU Family
Analog Peripherals
-
12-Bit ADC
•
•
•
•
•
Up to 200 ksps
Up to 32 external single-ended inputs
VREF from on-chip VREF, external pin or V
DD
Internal or external start of conversion source
Built-in temperature sensor
Programmable hysteresis and response time
Configurable as interrupt or reset source
Low current
Memory
-
4352 bytes internal data RAM (256 + 4096 XRAM)
-
64 or 32 kB Flash; In-system programmable in
512-byte Sectors
-
Two Comparators
•
•
•
Digital Peripherals
-
40, 33, or 25 Port I/O; All 5 V tolerant
-
CAN 2.0 Controller—no crystal required
-
LIN 2.1 Controller (Master and Slave capable); no
-
-
-
crystal required
Hardware enhanced UART, SMBus™, and
enhanced SPI™ serial ports
Four general purpose 16-bit counter/timers
16-Bit programmable counter array (PCA) with six
capture/compare modules and enhanced PWM
functionality
On-Chip Debug
-
On-chip debug circuitry facilitates full speed, non-
-
-
intrusive in-system debug (no emulator required)
Provides breakpoints, single stepping,
inspect/modify memory and registers
Superior performance to emulation systems using
ICE-chips, target pods, and sockets
Low cost, complete development kit
-
Supply Voltage 1.8 to 5.25 V
-
Typical operating current: 19 mA at 50 MHz;
-
Typical stop mode current: 2 µA
High-Speed 8051 µC Core
-
Pipelined instruction architecture; executes 70% of
-
-
instructions in 1 or 2 system clocks
Up to 50 MIPS throughput with 50 MHz clock
Expanded interrupt handler
Clock Sources
-
Internal 24 MHz with ±0.5% accuracy for CAN and
-
-
master LIN operation
External oscillator: Crystal, RC, C, or clock
(1 or 2 pin modes)
Can switch between clock sources on-the-fly;
useful in power saving modes
Packages
-
48-Pin QFP/QFN (C8051F500/1/4/5)
-
40-Pin QFN (C8051F508/9-F510/1)
-
32-Pin QFP/QFN (C8051F502/3/6/7)
Automotive Qualified
-
Temperature Range: –40 to +125 °C
-
Compliant to AEC-Q100
ANALOG
PERIPHERALS
A
M
U
X
DIGITAL I/O
UART 0
SMBus
SPI
PCA
Timers 0-3
CAN
LIN
Ports 0-4
Crossbar
External
Memory
Interface
12-bit
200 ksps
ADC
TEMP
SENSOR
VREG
Voltage
Comparators 0-1 VREF
24 MHz PRECISION
INTERNAL OSCILLATOR
2x Clock Multiplier
HIGH-SPEED CONTROLLER CORE
64 kB
ISP FLASH
FLEXIBLE
INTERRUPTS
8051 CPU
(50 MIPS)
DEBUG
CIRCUITRY
4 kB XRAM
POR
WDT
Rev. 1.1 3/10
Copyright © 2010 by Silicon Laboratories
C8051F500/1/2/3/4/5/6/7/8/9-F510/1
SILABS [ SILICON LABORATORIES ]
