Si1000/1/2/3/4/5
SFR Definition 14.1. PMU0CF: Power Management Unit Configuration
1,2
Bit
Name
Type
Reset
7
SLEEP
W
0
6
SUSPEND
W
0
5
CLEAR
W
0
4
RSTWK
R
Varies
3
RTCFWK
R/W
Varies
2
RTCAWK
R/W
Varies
1
PMATWK
R/W
Varies
0
CPT0WK
R/W
Varies
SFR Page = 0x0; SFR Address = 0xB5
Bit
Name
Description
7
6
5
4
3
SLEEP
SUSPEND
CLEAR
RSTWK
RTCFWK
Sleep Mode Select
Suspend Mode Select
Wake-up Flag Clear
Reset Pin Wake-up Flag
SmaRTClock Oscillator
Fail Wake-up Source
Enable and Flag
SmaRTClock Alarm
Wake-up Source Enable
and Flag
Port Match Wake-up
Source Enable and Flag
Write
Writing 1 places the
device in Sleep Mode.
Writing 1 places the
device in Suspend Mode.
Writing 1 clears all wake-
up flags.
N/A
0: Disable wake-up on
SmaRTClock Osc. Fail.
1: Enable wake-up on
SmaRTClock Osc. Fail.
0: Disable wake-up on
SmaRTClock Alarm.
1: Enable wake-up on
SmaRTClock Alarm.
0: Disable wake-up on
Port Match Event.
1: Enable wake-up on
Port Match Event.
0: Disable wake-up on
Comparator0 rising edge.
1: Enable wake-up on
Comparator0 rising edge.
N/A
N/A
N/A
Read
Set to 1 if a falling edge has
been detected on RST.
Set to 1 if the SmaRTClock
Oscillator has failed.
2
RTCAWK
Set to 1 if a SmaRTClock
Alarm has occurred.
1
PMATWK
Set to 1 if a Port Match
Event has occurred.
0
CPT0WK
Comparator0 Wake-up
Source Enable and Flag
Set to 1 if Comparator0 ris-
ing edge has occurred.
Notes:
1.
Read-modify-write operations (ORL, ANL, etc.) should not be used on this register. Wake-up sources must be
re-enabled each time the SLEEP or SUSPEND bits are written to 1.
2.
The Low Power Internal Oscillator cannot be disabled and the MCU cannot be placed in Suspend or Sleep
Mode if any wake-up flags are set to 1. Software should clear all wake-up sources after each reset and after
each wake-up from Suspend or Sleep Modes.
156
Rev. 1.0
SILABS [ SILICON LABORATORIES ]
