Si1000/1/2/3/4/5
of the RFIC. In RX direct mode, the chip must still acquire bit timing during the Preamble, and thus the pre-
amble detection threshold (SPI Register 35h) must still be programmed. Once the preamble is detected,
certain bit timing functions within the RX Modem change their operation for optimized performance over
the remainder of the packet. It is not required that a Sync word be present in the packet in RX Direct mode;
however, if the Sync word is absent then the skipsyn bit in SPI Register 33h must be set, or else the bit tim-
ing and tracking function within the RX Modem will not be configured for optimum performance.
23.4.2.3. Direct Synchronous Mode
In TX direct mode, the chip may be configured for synchronous or asynchronous modes of modulation. In
direct synchronous mode, the RFIC is configured to provide a TX Clock signal as an output to the external
device that is providing the TX Data stream. This TX Clock signal is a square wave with a frequency equal
to the programmed data rate. The external modulation source (e.g., MCU) must accept this TX Clock sig-
nal as an input and respond by providing one bit of TX Data back to the RFIC, synchronous with one edge
of the TX Clock signal. In this fashion, the rate of the TX Data input stream from the external source is con-
trolled by the programmed data rate of the RFIC; no TX Data bits are made available at the input of the
RFIC until requested by another cycle of the TX Clock signal. The TX Data bits supplied by the external
source are transmitted directly in real-time (i.e., not stored internally for later transmission).
All modulation types (FSK/GFSK/OOK) are valid in TX direct synchronous mode. As will be discussed in
the next section, there are limits on modulation types in TX direct asynchronous mode.
23.4.2.4. Direct Asynchronous Mode
In TX direct asynchronous mode, the RFIC no longer controls the data rate of the TX Data input stream.
Instead, the data rate is controlled only by the external TX Data source; the RFIC simply accepts the data
applied to its TX Data input pin, at whatever rate it is supplied. This means that there is no longer a need
for a TX Clock output signal from the RFIC, as there is no synchronous "handshaking" between the RFIC
and the external data source. The TX Data bits supplied by the external source are transmitted directly in
real-time (i.e., not stored internally for later transmission).
It is not necessary to program the data rate parameter when operating in TX direct asynchronous mode.
The chip still internally samples the incoming TX Data stream to determine when edge transitions occur;
however, rather than sampling the data at a pre-programmed data rate, the chip now internally samples
the incoming TX Data stream at its maximum possible oversampling rate. This allows the chip to accu-
rately determine the timing of the bit edge transitions without prior knowledge of the data rate. (Of course,
it is still necessary to program the desired peak frequency deviation.)
Only FSK and OOK modulation types are valid in TX Direct Asynchronous Mode; GFSK modulation is not
available in asynchronous mode. This is because the RFIC does not have knowledge of the supplied data
rate, and thus cannot determine the appropriate Gaussian lowpass filter function to apply to the incoming
data.
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Rev. 1.0
SILICON [ SILICON ]
