Si1000/1/2/3/4/5
Table 24.6. SMBus Status Decoding With Hardware ACK Generation Enabled (EHACK = 1)
Values Read
Current SMbus State
Typical Response Options
Valuesto
Write
1110
1100
0
0
0
0
X
0
A master START was gener- Load slave address + R/W into
ated. SMB0DAT.
0
0
X
1100
A master data or address byte Set STA to restart transfer.
1
0
0
1
X
X
1110
-
was transmitted; NACK
received.
Abort transfer.
0
0
1
A master data or address byte Load next data byte into
0
0
X
1100
was transmitted; ACK
received.
SMB0DAT.
End transfer with STOP.
0
1
1
X
X
-
-
End transfer with STOP and start 1
another transfer.
Send repeated START.
1
0
0
X
1
1110
1000
Switch to Master Receiver Mode 0
(clear SI without writing new data
to SMB0DAT). Set ACK for initial
data byte.
1000
0
0
1
A master data byte was
received; ACK sent.
Set ACK for next data byte;
Read SMB0DAT.
0
0
0
1
0
1000
1000
Set NACK to indicate next data
byte as the last data byte;
Read SMB0DAT.
0
Initiate repeated START.
1
0
0
0
0
1110
1100
Switch to Master Transmitter
Mode (write to SMB0DAT before
clearing SI).
X
0
0
0
A master data byte was
received; NACK sent (last
byte).
Read SMB0DAT; send STOP.
0
1
1
1
0
0
-
Read SMB0DAT; Send STOP
followed by START.
1110
Initiate repeated START.
1
0
0
0
0
1110
1100
Switch to Master Transmitter
Mode (write to SMB0DAT before
clearing SI).
X
308
Rev. 1.0
SILICON [ SILICON ]
