SI1010-A-GM 参数 Datasheet PDF下载

Si1010/1/2/3/4/5

5.7. ADC0 Analog Multiplexer

ADC0 on Si1010/1/2/3/4/5 has an analog multiplexer, referred to as AMUX0.

AMUX0 selects the positive inputs to the single-ended ADC0. Any of the following may be selected as the

positive input: Port I/O pins, the on-chip temperature sensor, the VBAT Power Supply, Regulated Digital

Supply Voltage (Output of VREG0), VDD/DC+ Supply, or the positive input may be connected to GND. The

ADC0 input channels are selected in the ADC0MX register described in SFR Definition 5.12.

ADC0MX

AM0MX0

AD0MX4

AD0MX3

AD0MX2

AD0MX1

P0.0

Programmable

Attenuator

AIN+

P1.6*

Temp

Sensor

AMUX

ADC0

VBAT

Digital Supply

VDD_MCU/DC+

Gain = 0. 5 or 1

*P1.0 – P1.3 are not

available as device pins

Figure 5.7. ADC0 Multiplexer Block Diagram

Important Note About ADC0 Input Configuration:

Port pins selected as ADC0 inputs should be config-

ured as analog inputs, and should be skipped by the Digital Crossbar. To configure a Port pin for analog

input, set to 0 the corresponding bit in register PnMDIN and disable the digital driver (PnMDOUT = 0 and

Port Latch = 1). To force the Crossbar to skip a Port pin, set to 1 the corresponding bit in register PnSKIP.

See Section “21. Port Input/Output” on page 219 for more Port I/O configuration details.

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Rev. 1.0