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SI1034-A-GM 参数 Datasheet PDF下载

SI1034-A-GM图片预览
型号: SI1034-A-GM
PDF下载: 下载PDF文件 查看货源
内容描述: 超低功耗128K , LCD MCU系列 [Ultra Low Power 128K, LCD MCU Family]
分类和应用:
文件页数/大小: 538 页 / 4351 K
品牌: SILABS [ SILICON LABORATORIES ]
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Si102x/3x
14.2.1. Key Inversion using DMA
Normally, the AES block is used with the DMA. This provides the best performance and lowest power con-
sumption. Code examples are provided in 8051 compiler independent C code using the DMA. It is highly
recommended to use the code examples. The steps are listed here for completeness.
Steps to generate the Decryption Key from Encryption Key
Prepare encryption key and dummy data in XRAM.
Reset AES module by clearing bit 3 of AES0BCFG.
Disable the first three DMA channels by clearing bits 0 to 2 in DMA0EN.
Configure the first DMA channel for AES0KIN.
the first DMA channel by writing 0x00 to DMA0SEL.

Configure the first DMA channel to move XRAM to AES0KIN by writing 0x05 to DMA0NCF.

Clear DMA0NMD to disable wrapping.

Write the XRAM address of the encryption key to DMA0NBAH and DMA0NBAL.

Write the key length in bytes to DMA0NSZL.

Clear DMA0NSZH

Clear DMA0NAOH and DMA0NAOL.

Select
Configure the second DMA channel for AES0BIN.
the second DMA channel by writing 0x01 to DMA0SEL.

Configure the second DMA channel to move xram to AES0BIN sfr by writing 0x06 to the DMA0NCF sfr.

Clear DMA0NMD to disable wrapping.

Write the xram address of dummy data to DMA0NBAH and DMA0NBAL.

Write 0x10 (16) to DMA0NSZL.

Clear DMA0NSZH

Clear DMA0NAOH and DMA0NAOL

Select
Configure the third DMA channel for AES0YOUT.

Select
the third DMA channel by writing 0x02 to DMA0SEL.

Configure the third DMA channel to move the contents of AES0YOUT to XRAM by writing 0x08 to DMA0NCF.

Enable transfer complete interrupt by setting bit 7 of DMA0NCF.

Clear DMA0NMD to disable wrapping.

Write the XRAM address for the decryption key to DMA0NBAH and DMA0NBAL.

Write the key length in bytes to DMA0NSZL.

Clear DMA0NSZH.

Clear DMA0NAOH and DMA0NAOL.
Clear first three DMA interrupts by clearing bits 0 to 2 in DMA0INT.
Enable first three DMA channels setting bits 0 to 2 in DMA0EN
Configure the AES module data flow for inverse key generation by writing 0x04 to AES0DCFG.
Write key size to bits 1 and 0 of AES0BCFG.
Configure the AES core for encryption by setting bit 2 of AES0BCFG.
Initiate the encryption operation by setting bit 3 of AES0BCFG.
Wait on the DMA interrupt from DMA channel 2.
Disable the AES module by clearing bit 2 of AES0BCFG.
Disable the DMA by writing 0x00 to DMA0EN.
Rev. 0.3
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