欢迎访问ic37.com |
会员登录 免费注册
发布采购

SI1034-A-GM 参数 Datasheet PDF下载

SI1034-A-GM图片预览
型号: SI1034-A-GM
PDF下载: 下载PDF文件 查看货源
内容描述: 超低功耗128K , LCD MCU系列 [Ultra Low Power 128K, LCD MCU Family]
分类和应用:
文件页数/大小: 538 页 / 4351 K
品牌: SILABS [ SILICON LABORATORIES ]
 浏览型号SI1034-A-GM的Datasheet PDF文件第189页浏览型号SI1034-A-GM的Datasheet PDF文件第190页浏览型号SI1034-A-GM的Datasheet PDF文件第191页浏览型号SI1034-A-GM的Datasheet PDF文件第192页浏览型号SI1034-A-GM的Datasheet PDF文件第194页浏览型号SI1034-A-GM的Datasheet PDF文件第195页浏览型号SI1034-A-GM的Datasheet PDF文件第196页浏览型号SI1034-A-GM的Datasheet PDF文件第197页  
Si102x/3x
14.6.2. CBC Encryption Initialization Vector Location
The first block to be encrypted uses the initialization vector for the AES0XIN data. Subsequent blocks will
use the encrypted ciphertext from the previous block. The DMA is capable of encrypting multiple bocks. If
the initialization is located at an arbitrary location in XRAM, the DMA base address location will need to be
changed to the start of the encrypted ciphertext after encrypting the first block. However, if the initialization
vector is located in XRAM immediately before the encrypted ciphertext, the pointer will be advanced to the
start of the encrypted ciphertext, and multiple blocks can be encrypted autonomously.
14.6.3. CBC Encryption using DMA
Normally, the AES block is used with the DMA. This provides the best performance and lowest power con-
sumption. Code examples are provided in 8051 compiler independent C code using the DMA. It is highly
recommended to use the code examples. The steps are listed here for completeness.
Prepare encryption key, initialization vector, and data to be encrypted in XRAM.
(The initialization vector should be located immediately before the data to be encrypted to encrypt multiple
blocks.)
Reset AES module by clearing bit 2 of AES0BCFG.
Disable the first four DMA channels by clearing bits 0 to 3 in DMA0EN.
Configure the first DMA channel for AES0KIN
the first DMA channel by writing 0x00 to DMA0SEL

Configure the first DMA channel to move XRAM to AES0KIN by writing 0x05 to DMA0NCF

Write 0x01 to DMA0NMD to enable wrapping

Write the XRAM location of the encryption key to DMA0NBAH and DMA0NBAL.

Write the key length in bytes to DMA0NSZL

Clear DMA0NSZH

Clear DMA0NAOH and DMA0NAOL

Select
Configure the second DMA channel for AES0BIN.
the second DMA channel by writing 0x01 to DMA0SEL.

Configure the second DMA channel to move XRAM to AES0BIN by writing 0x06 to DMA0NCF.

Clear DMA0NMD to disable wrapping.

Write the XRAM address of the data to be encrypted to DMA0NBAH and DMA0NBAL.

Write the number of bytes to be encrypted in multiples of 16 bytes to DMA0NSZH and DMA0NSZL.

Clear DMA0NAOH and DMA0NAOL.

Select
Configure the third DMA channel for AES0XIN.

Select
the third DMA channel by writing 0x02 to DMA0SEL.

Configure the third DMA channel to move xram to AES0XIN sfr by writing 0x07 to the DMA0NCF sfr.

Clear DMA0NMD to disable wrapping.

Write the XRAM address of the initialization vector to DMA0NBAH and DMA0NBAL.

Write the number of bytes to be encrypted in multiples of 16 bytes to DMA0NSZH and DMA0NSZL.

Clear DMA0NAOH and DMA0NAOL.
* Configure the forth DMA channel for the AES0YOUT sfr
the forth channel by writing 0x03 to DMA0SEL

Configure the fourth DMA channel to move the contents of AES0YOUT to XRAM by writing 0x08 to DMA0NCF

Enable transfer complete interrupt by setting bit 7 of DMA0NCF

Clear DMA0NMD to disable wrapping

Write the XRAM address for the encrypted data to DMA0NBAH and DMA0NBAL.

Write the number of bytes to be encrypted in multiples of 16 bytes to DMA0NSZH and DMA0NSZL.

Clear DMA0NAOH and DMA0NAOL.

Select
Clear first four DMA interrupts by clearing bits 0 to 3 in DMA0INT.
Enable first four DMA channels by setting bits 0 to 3 in DMA0EN
Configure the AES module data flow for XOR on input data by writing 0x01 to AES0DCFG.
Rev. 0.3
193