Si102x/3x
14.6.6. CTR Encryption using DMA
Normally, the AES block is used with the DMA. This provides the best performance and lowest power con-
sumption. Code examples are provided in 8051 compiler independent C code using the DMA. It is highly
recommended to use the code examples. The steps are listed here for completeness.
Prepare encryption key, counter, and data to be encrypted in XRAM.
Reset the AES module by clearing bit 2 of AES0BCFG.
Disable the first four DMA channels by clearing bits 0 to 3 in DMA0EN.
Configure the first DMA channel for AES0KIN
Select
the first DMA channel by writing 0x00 to DMA0SEL
Configure the first DMA channel to move XRAM to AES0KIN by writing 0x05 to DMA0NCF
Clear DMA0NMD to disable wrapping.
Write the XRAM location of the encryption key to DMA0NBAH and DMA0NBAL.
Write the key length in bytes to DMA0NSZL
Clear DMA0NSZH
Clear DMA0NAOH and DMA0NAOL
Configure the second DMA channel for AES0BIN.
the second DMA channel by writing 0x01 to DMA0SEL.
Configure the second DMA channel to move xram to AES0BIN sfr by writing 0x06 to the DMA0NCF sfr.
Clear DMA0NMD to disable wrapping.
Write the XRAM address of the data to be encrypted to DMA0NBAH and DMA0NBAL.
Write the number of bytes to be encrypted in multiples of 16 bytes to DMA0NSZH and DMA0NSZL
Clear the DMA0NSZH sfr
Clear the DMA0NAOH and DMA0NAOL sfrs.
Select
Configure the third DMA channel for the AES0XIN sfr.
Select
the third DMA channel by writing 0x02 to DMA0SEL.
Configure the third DMA channel to move XRAM to AES0XIN by writing 0x07 to DMA0NCF.
Clear DMA0NMD to disable wrapping.
Write the XRAM address of the counter to DMA0NBAH and DMA0NBAL.
Write the number of bytes to be encrypted in multiples of 16 bytes to DMA0NSZH and DMA0NSZL.
Clear DMA0NAOH and DMA0NAOL.
Configure the fourth DMA channel for AES0YOUT
the fourth channel by writing 0x03 to DMA0SEL
Configure the forth DMA channel to move the contents of AES0YOUT to XRAM by writing 0x08 to DMA0NCF
Enable transfer complete interrupt by setting bit 7 of DMA0NCF
Clear DMA0NMD to disable wrapping
Write the number of bytes to be encrypted in multiples of 16 bytes to DMA0NSZH and DMA0NSZL.
Clear DMA0NAOH and DMA0NAOL.
Select
Clear first four DMA interrupts by clearing bits 0 to 3 in DMA0INT.
Enable first four DMA channels setting bits 0 to 3 in DMA0EN.
Configure the AES module data flow for XOR on output data by writing 0x02 to AES0DCFG.
Write key size to bits 1 and 0 of AES0BCFG
Configure the AES core for encryption by setting bit 2 of AES0BCFG
Initiate the encryption operation be setting bit 3 of AES0BCFG
Wait on the DMA interrupt from DMA channel 3
Disable the AES Module by clearing bit 2 of AES0BCFG
Disable the DMA by writing 0x00 to DMA0EN
Increment counter and repeat all steps for additional blocks
Rev. 0.3
201
SILABS [ SILICON LABORATORIES ]
