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SI3215-GT 参数 Datasheet PDF下载

SI3215-GT图片预览
型号: SI3215-GT
PDF下载: 下载PDF文件 查看货源
内容描述: PROSLIC㈢可编程CMOS SLIC / CODEC通过来电/电池电压生成 [PROSLIC㈢ PROGRAMMABLE CMOS SLIC/CODEC WITH RINGING/BATTERY VOLTAGE GENERATION]
分类和应用: 模拟传输接口电池电信集成电路电信电路光电二极管
文件页数/大小: 118 页 / 1480 K
品牌: SILABS [ SILICON LABORATORIES ]
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Si3215
Table 3. AC Characteristics (Continued)
(V
DDA
, V
DDD
= 3.13 to 5.25 V, T
A
= 0 to 70 °C for K-Grade, –40 to 85 °C for B-Grade)
Parameter
2-Wire Return Loss
Transhybrid Balance
Idle Channel Noise
4
Test Condition
200 Hz to 3.4 kHz
300 Hz to 3.4 kHz
Noise Performance
C-Message Weighted
Psophometric Weighted
3 kHz flat
Min
30
30
40
40
40
56
43
53
53
40
Typ
35
60
60
60
60
Max
15
–75
18
Unit
dB
dB
dBrnC
dBmP
dBrn
dB
dB
dB
dB
dB
dB
dB
dB
PSRR from VDDA
PSRR from VDDD
PSRR from VBAT
Longitudinal to Metallic or PCM
Balance
RX and TX, DC to 3.4 kHz
RX and TX, DC to 3.4 kHz
RX and TX, DC to 3.4 kHz
Longitudinal Performance
200 Hz to 3.4 kHz,
β
Q1,Q2
150, 1% mismatch
β
Q1,Q2
=
60 to 240
5
β
Q1,Q2
=
300 to 800
5
Using Si3201
Metallic to Longitudinal Balance
Longitudinal Impedance
200 Hz to 3.4 kHz
200 Hz to 3.4 kHz at TIP or
RING
Register selectable
ETBO/ETBA
00
01
10
Longitudinal Current per Pin
Active off-hook
200 Hz to 3.4 kHz
Register selectable
ETBO/ETBA
33
17
17
00
01
10
4
8
8
mA
mA
mA
Notes:
1.
The input signal level should be 0 dBm0 for frequencies greater than 100 Hz. For 100 Hz and below, the level should be
–10 dBm0. The output signal magnitude at any other frequency will be smaller than the maximum value specified.
2.
Analog signal measured as V
TIP
– V
RING
. Assumes ideal line impedance matching.
3.
The quantization errors inherent in the µ3/A-law companding process can generate slightly worse gain tracking
performance in the signal range of 3 dB to –37 dB for signal frequencies that are integer divisors of the 8 kHz PCM
sampling rate.
4.
The level of any unwanted tones within the bandwidth of 0 to 4 kHz does not exceed –55 dBm.
5.
Assumes normal distribution of betas.
6
Rev. 0.92