Si4133W
RF S
Y N T H E S I Z E R W I T H
I
N T E G R A T E D
V C O
S
F O R
W- CD M A
A N D
G S M / U M T S W
I R E L E S S
C
O M M U N I C A T I O N S
Features
Dual RF synthesizers
RF1: 2.3 GHz to 2.6 GHz
RF2: 750 MHz to 1.7 GHz
IF synthesizer
IF: 62.5 MHz to 1.0 GHz
Integrated VCOs, loop filters,
dividers, and phase detectors
Minimal external components
Continuous operation over a
wide temperature range
Fast settling time: 200
µsec
Low phase noise
5 µA standby current
28-lead MLP, 5 x 5 mm
Ordering Information:
See page 28.
Applications
Single-mode W-CDMA wireless
handsets, terminals, and
modems
Dual-mode GSM/UMTS wireless
handsets, terminals, and
modems
GNDR
RFLD
Pin Assignments
Si4133W-BM
SDATA
IFOUT
GNDR
SENB
SCLK
GNDI
VDDI
Description
The Si4133W is a monolithic integrated circuit that performs RF and IF
synthesis for GSM/GPRS and W-CDMA wireless communications. In dual-
mode GSM/UMTS handsets, the Si4133W meets demanding requirements
for very low phase noise and fast settling time for both modes. The Si4133W
integrates three complete phase-locked loops (PLLs) on a single die
including VCOs, loop filters, reference and VCO dividers, and phase
detectors. Dividers and powerdown settings are programmable through a
three-wire serial interface.
GNDI
IFLB
IFLA
GNDD
VDDD
GNDD
XIN
RFLC
GNDR
NC
GNDR
GNDR
AUXOUT
RFOUT
GNDR
GNDR
Functional Block Diagram
Patents pending
XIN
Reference
Am plifier
Power
Down
Control
÷
R
Phase
Detector
RF1
PW DNB
÷
N
÷
R
RFOUT
SDATA
SCLK
SENB
Serial
Interface
22-bit
Data
Register
Phase
Detector
RF2
RFLC
RFLD
÷
N
÷
R
AUXOUT
Test
Mux
Phase
Detector
IF
IFDIV
IFOUT
÷
N
IFLA
IFLB
Rev. 1.1 9/02
Copyright © 2002 by Silicon Laboratories
Si4133W-DS11
PW DNB
GNDD
VDDR
SILABS [ SILICON LABORATORIES ]
