Si41 33G
Si412 3G/22G/13G/12G
D
U A L
-B
A N D
R F S
Y N T H E S I Z E R
W
I T H
I
N T E G R A T E D
V C O
S
F
OR
GSM
AND
GPRS W
IRELESS
C
OMMUNICATIONS
Features
"
"
RF1: 900 MHz to 1.8 GHz
RF2: 750 MHz to 1.5 GHz
IF: 500 MHz to 1000 MHz
!
!
!
!
!
!
!
IF Synthesizer
"
Integrated VCOs, Loop Filters,
!
!
Varactors, and Resonators
Minimal External Components
Required
Applications
Pin Assignments
!
GSM, DCS1800, and PCS1900
Cellular Telephones
!
!
GPRS Data Terminals
HSCSD Data Terminals
S C LK
S D ATA
Description
The Si4133G is a monolithic integrated circuit that performs both IF and
dual-band RF synthesis for GSM and GPRS wireless communications
applications. The Si4133G includes three VCOs, loop filters, reference and
VCO dividers, and phase detectors. Divider and power down settings are
programmable through a three-wire serial interface.
S
i4
13
3G
-B
T
!
Dual-Band RF Synthesizers
!
Fast Settling Time: 140
µs
Low Phase Noise
Programmable Power Down Modes
1 µA Standby Current
18 mA Typical Supply Current
2.7 V to 3.6 V Operation
Packages: 24-Pin TSSOP and
28-Pin MLP
Ordering Information:
See page 28.
Si4133G-BT
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
SENB
VDDI
IF O U T
GNDI
IF L B
IF L A
GNDD
VDDD
GNDD
X IN
PW DNB
AUXOUT
GNDR
R FL D
R FL C
GNDR
R FL B
Functional Block Diagram
R efe re nce
A m p lifier
P ow er
D ow n
C ontrol
R FL A
GNDR
GNDR
X IN
÷
65
P hase
D etector
R F1
R FL A
R FL B
R FO U T
VDDR
P W DN B
÷
N
R FO U T
S DA TA
S CL K
S EN B
SDATA
IFOUT
23
GNDR
SENB
SCLK
R FL D
R F2
22-b it
D ata
R egister
÷
N
GNDR
1
2
3
4
5
6
7
28
27
26
25
24
22
21
20
19
18
17
16
15
GNDI
VDD I
S erial
Interfa ce
P hase
D etector
R FL C
Si4133G-BM
GNDI
IF L B
IF L A
GNDD
VDDD
GNDD
X IN
A UX O U T
Test
Mux
P hase
D etector
IF
IFO UT
R FLD
R FLC
÷
N
IFL A
IFL B
GNDR
R FLB
R FLA
GNDR
8
9
10
11
12
13
14
RFOU T
AUX OU T
GNDR
GNDR
VDDR
PW DNB
Patents pending
Rev. 1.1 4/01
Copyright © 2001 by Silicon Laboratories
Si4133G-DS11
GNDD