Si4730/31/34/35-D60
B
ROADCAST
AM/FM/SW/LW R
ADIO
R
ECEIVER
Features
Worldwide FM band support
(64–108 MHz)
Worldwide AM band support
(520–1710 kHz)
SW band support (Si4734/35)
(2.3–26.1 MHz)
LW band support (Si4734/35)
(153–279 kHz)
Excellent real-world performance
Integrated VCO
Advanced AM/FM seek tuning
Automatic frequency control (AFC)
Automatic gain control (AGC)
Digital FM stereo decoder
Programmable de-emphasis
Advanced Audio Processing
Multiplexed stereo audio AUXIN
ADC with 85 dB dynamic range
Seven selectable AM channel filters
AM/FM/SW/LW digital tuning
EN55020 compliant
No manual alignment necessary
Programmable reference clock
Adjustable soft mute control
RDS/RBDS processor (Si4731/35)
Digital audio out
2-wire and 3-wire control interface
Integrated LDO regulator
Wide range of ferrite loop sticks and
air loop antennas supported
QFN and SSOP packages
RoHS compliant
Ordering Information:
See page 33.
Pin Assignments
Si473x-D60 (QFN)
GPO3/[DCLK]
17
10
VD
GPO2/[INT]
DFS/[RIN]
16
15 DOUT/[LIN]
14 LOUT/[DFS]
13 ROUT/[DOUT]
12 GND
7
SCLK
8
SDIO
9
RCLK
11 VA
GPO1
19
NC
Applications
Table and portable radios
Mini/micro systems
CD/DVD and Blu-ray players
Stereo boom boxes
Modules for consumer electronics
Clock radios
Mini HiFi and docking stations
Entertainment systems
NC
1
20
18
FMI 2
RFGND 3
AMI 4
RST 5
6
SEN
GND
PAD
Description
The Si473x-D60 digital CMOS AM/FM radio receiver IC integrates the complete
tuner function from antenna input to digital audio output and includes a stereo
audio AUXIN ADC input for converting analog audio into standard I2S digital
audio, enabling a cost efficient digital audio platform for consumer electronic
applications with high TDMA noise immunity, superior radio performance, and
high fidelity audio power amplification. When enabling the analog inputs in stereo
AUXIN ADC-mode, the Si473x-D60 supports I2S digital audio output only (no
analog output).
Si473x-D60(SSOP)
DOUT/[LIN]
DFS/[RIN]
GPO3/[DCLK]
GPO2/[INT]
GPO1
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
LOUT/[DFS]
ROUT/[DOUT]
DBYP
VA
VD
RCLK
SDIO
SCLK
SEN
RST
GND
GND
Functional Block Diagram
FM / SW
AN T
R IN
LIN
FM I
LN A
AGC
A M / LW
A NT
AMI
R FG N D
2.7~5.5 V (Q FN )
2.0~5.5 V (SSO P)
+
LN A
AGC
VA
GND
LD O
AFC
M ux
M ux
FMI
RFGND
Si473x-D60
RD S
(S i4731/
35)
LO W -IF
AD C
D SP
AD C
DA C
LO UT
DA C
DO UT
DIG ITA L
AU D IO
DFS
G PO /D CLK
NC
NC
AMI
RO UT
CO NTR O L
INTER FAC E
VD
1.62 - 3.6 V
This product, its features, and/or its
architecture is covered by one or more of
the following patents, as well as other
patents, pending and issued, both
foreign and domestic: 7,127,217;
7,272,373;
7,272,375;
7,321,324;
7,355,476;
7,426,376;
7,471,940;
7,339,503; 7,339,504.
RCLK
SCLK
SEN
Rev. 1.1 11/11
Copyright © 2011 by Silicon Laboratories
SDIO
RST
Si473x-D60
SILABS [ SILICON LABORATORIES ]
