Si52144
PCI-E
XPRESS
G
EN
1, G
EN
2 , & G
EN
3 C
LOCK
Q
UAD
O
UTPUT
G
EN ERATOR
Features
PCI-Express Gen 1, Gen 2, &
Gen 3 Compliant
Low power push-pull type
differential output buffers
Integrated resistors on differential
clocks
Dedicated output enable
hardware pin for each clock
Hardware selectable spread
control
Four PCI-Express Clocks
25 MHz crystal input or clock
input
I
2
C support with readback
capabilities
Triangular spread spectrum
profile for maximum
electromagnetic interference
(EMI) reduction
Industrial temperature:
–40 to 85
o
C
3.3 V power supply
24-pin QFN package
Ordering Information:
See page 18
Applications
Network attached storage
Multi-function printer
Pin Assignments
VDD_CORE
VSS_CORE
XIN/CLKIN
SDATA
20
24
23
22
XOUT
21
Description
The Si52144 is a spread-controlled PCIe clock generator that can source
four PCIe clocks simultaneously. The device has four hardware output
enable control inputs for enabling the respective differential outputs on the
fly while powered on along with the spread control hardware pin to enable
spread for EMI reduction. In addition to the hardware control pins, I
2
C
programmability is also available to promptly achieve optimum clock
signal integrity through skew and edge rate control on true, compliment,
or both differential outputs as well as amplitude control.
SCLK
19
1
18 OE3
Wireless access point
Routers
VDD
OE1
1
SSON
2
VSS
OE2
1
VDD
1
2
3
4
5
6
17 VDD
16 DIFF3
15 DIFF3
14 DIFF2
13 DIFF2
7
8
9
10
11
12
25
GND
DIFF0
DIFF1
DIFF1
Notes:
1. Internal 100 kohm pull-up.
2. Internal 100 kohm pull-down.
Functional Block Diagram
Patents pending
XIN/CLKIN
XOUT
DIFF0
DIFF1
PLL
(SSC)
Divider
DIFF2
DIFF3
SCLK
SDATA
OE [3:0]
SSON
Control & Memory
Control
RAM
Preliminary Rev. 0.1 12/11
Copyright © 2011 by Silicon Laboratories
DIFF0
OE0
1
VDD
Si52144
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
SILABS [ SILICON LABORATORIES ]
