Si5310
P
R E C I S I O N
C
L O C K
M
U L T I P L I E R
/ R
E G E N E R A T O R
IC
Features
Complete precision clock multiplier and clock regenerator device:
Performs clock multiplication to one
of two frequency ranges:
150–167 MHz or 600–668 MHz
Jitter generation as low as
0.5 ps
rms
for 622 MHz output
Accepts input clock from
9.4–668 MHz
Regenerates a “clean”, jitter-
attenuated version of input clock
DSPLL™ technology provides
superior jitter performance
Small footprint: 4 x 4 mm
Low power: 310 mW typical
ROHS-compliant Pb-free
packaging option available
Ordering Information:
See page 21.
Applications
SONET/SDH systems
Terabit routers
Digital cross connects
Optical transceiver modules
Gigabit Ethernet systems
Fibre channel
Pin Assignments
Si5310
MULTOUT+
MULTOUT–
15
MULTSEL
Description
REXT
1
2
3
4
5
20 19 18 17 16
PWRDN
VDD
CLKOUT+
CLKOUT–
VDD
The Si5310 is a fully integrated low-power clock multiplier and clock
regenerator IC. The clock multiplier generates an output clock that is an
integer multiple of the input clock. The clock regenerator operates
simultaneously, creating a “clean” version of the input clock by using the
clock synthesis phase-locked loop (PLL) to remove unwanted jitter and
square up the input clock’s rising and falling edges. The Si5310 uses
Silicon Laboratories patented DSPLL
®
architecture to achieve superior
jitter performance while eliminating the analog loop filter found in
traditional PLL designs with a digital signal-processing algorithm.
The Si5310 represents a new standard in low jitter, small size, low power,
and ease-of-use for clock devices. It operates from a single 2.5 V supply
over the industrial temperature range (–40 to 85 °C).
VDD
GND
REFCLK+
REFCLK–
GND
NC
GND
Pad
14
13
12
11
6
LOL
7
VDD
8
GND
9
CLKIN+
10
CLKIN–
Functional Block Diagram
Regeneration
BUF
2
CLKOUT+
CLKOUT–
CLKIN+
CLKIN–
2
BUF
DSPLL
®
Phase-Locked
Loop
Calibration
2
PWRDN/CAL
MULTOUT+
MULTOUT–
LOL
BUF
2
Bias Gen
REFCLK+
REFCLK–
MULTSEL
REXT
Rev. 1.2 8/06
Copyright © 2006 by Silicon Laboratories
Si5310
SILABS [ SILICON LABORATORIES ]
