Si5338
I
2
C - P
R O G R A M M A B LE
A
N Y
- F
R E Q U E N C Y
, A
N Y
-O
UTPU T
Q
U A D
C
L OC K
G
E N E R A T O R
Features
CLK0A
CLK0B
VDD
VDDO0
20
Low power MultiSynth™ technology
enables independent, any-frequency
synthesis on four differential output
drivers
Highly-configurable output drivers with
up to four differential outputs, eight
single-ended clock outputs, or a
combination of both
Low phase jitter of 0.7 ps RMS typ
High precision synthesis allows true
zero ppm frequency accuracy on all
outputs
Flexible input reference:
External crystal: 8 to 30 MHz
CMOS input: 5 to 200 MHz
SSTL/HSTL input: 5 to 350 MHz
Differential input: 5 to 710 MHz
Independently configurable outputs
support any frequency or format:
LVPECL/LVDS: 0.16 to 710 MHz
HCSL: 0.16 to 250 MHz
CMOS: 0.16 to 200 MHz
SSTL/HSTL: 0.16 to 350 MHz
Independent output voltage per driver:
1.5, 1.8, 2.5, or 3.3 V
RSVD_GND
I
2
C/SMBus compatible interface
Easy to use programming software
Small size: 4 x 4 mm, 24-QFN
Low power: 45 mA core supply typ
Wide temperature range: –40 to
+85 °C
24
23
22
21
19
18
CLK1A
17
CLK1B
16
VDDO1
15
VDDO2
14
CLK2A
13
CLK2B
IN1
1
IN2
2
IN3
3
IN4
4
IN5
5
GND
GND
Pad
Applications
Ethernet switch/router
PCI Express 2.0/3.0
Broadcast video/audio timing
Processor and FPGA clocking
Any-frequency clock conversion
MSAN/DSLAM/PON
Fibre Channel, SAN
Telecom line cards
IN6
6
7
8
9
10
11
12
INTR
Description
The Si5338 is a high-performance, low-jitter clock generator capable of
synthesizing any frequency on each of the device's four output drivers. This timing
IC is capable of replacing up to four different frequency crystal oscillators or
operating as a frequency translator. Using its patented MultiSynth™ technology,
the Si5338 allows generation of four independent clocks with 0 ppm precision.
Each output clock is independently configurable to support various signal formats
and supply voltages. The Si5338 provides low-jitter frequency synthesis in a
space-saving 4 x 4 mm QFN package. The device is programmable via an I
2
C/
SMBus-compatible serial interface and supports operation from a 1.8, 2.5, or
3.3 V core supply. I
2
www.silabs.com/ClockBuilder.
Rev. 0.6 9/10
Copyright © 2010 by Silicon Laboratories
VDDO3
CLK3B
CLK3A
VDD
SCL
SDA
Single supply core with excellent
PSRR: 1.8, 2.5, 3.3 V
Independent frequency increment/
decrement feature enables
glitchless frequency adjustments in
1 ppm steps
Independent phase adjustment on
each of the output drivers with an
accuracy of <20 ps steps
Highly configurable spread
spectrum (SSC) on any output:
Any frequency from 5 to 350 MHz
Any spread from 0.5 to 5.0%
Any modulation rate from 33 to
63 kHz
External feedback mode allows
zero-delay mode
Loss of lock and loss of signal
alarms
Ordering Information:
See page 168.
Pin Assignments
Top View
Si5338