Si5338
6.2. Register Categories
This is a list of registers needed to define the Configuration of a device. Set the PAGEBIT to access registers with
addresses greater than 255.
Address (Decimal)
6
27
27
28 - 30
31 - 39
40
41
42
47
48
49
50
51
52
53-61
62
63
64-72
73
74
75-83
84
85
86-94
95
97-105
106
107 - 110
111 - 114
115 - 118
Bits
4:0
7:6
7
7:0
7:0
7:0
6:0
4:0
5:2
7:0
6:0
7:0
7:4, 2:0
6:0
7:0
5:0
6:0
7:0
5:0
6:0
7:0
5:0
6:0
7:0
5:0
7:0
5:0
7:0
7:0
7:0
MultiSynthN Feedback divider Configuration
MultiSynth0 Phase inc/dec, SS Configuration, drive state
MultiSynth1 Phase inc/dec, SS Configuration, drive state
MultiSynth2 Phase inc/dec, SS Configuration, drive state
MultiSynth3 frequency Configuration
MultiSynth2 frequency Configuration
MultiSynth1 frequency Configuration
MultiSynth0 frequency Configuration
MultiSynth0 Freq inc/dec, SS, Phase inc/dec Configuration
PLL Configuration
Input Configuration
Output Driver Trim Bits
Function
Mask bits for LOS_CLKIN,LOS_FB, LOL, SYS_CAL
I
2
C Configuration
Input Mux Configuration
Output Configuration
42
Rev. 0.6
SILABS [ SILICON LABORATORIES ]
