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SI5365-B-GQ 参数 Datasheet PDF下载

SI5365-B-GQ图片预览
型号: SI5365-B-GQ
PDF下载: 下载PDF文件 查看货源
内容描述: 引脚可编程精密时钟乘法器 [PIN-PROGRAMMABLE PRECISION CLOCK MULTIPLIER]
分类和应用: ATM集成电路SONET集成电路SDH集成电路电信集成电路电信电路异步传输模式时钟
文件页数/大小: 18 页 / 239 K
品牌: SILABS [ SILICON LABORATORIES ]
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Si5365
P
R E L I M I N A R Y
D
A TA
S
H E E T
P
IN
-P
ROGRAMMABLE
P
RECISION
C
LOCK
M
ULTIPLIER
Description
The Si5365 is a low jitter, precision clock multiplier for
high-speed communication systems, including SONET
OC-48/OC-192, Ethernet, and Fibre Channel, in which
the application requires clock multiplication without
jitter attenuation. The Si5365 accepts four clock inputs
ranging from 19.44 to 707 MHz and generates five
frequency-multiplied clock outputs ranging from 19.44
to 1050 MHz. The input clock frequency and clock
multiplication ratio are selectable from a table of
popular SONET, Ethernet, and Fibre Channel rates.
The Si5365 is based on Silicon Laboratories' 3rd-
generation DSPLL
®
technology, which provides any-
rate frequency synthesis in a highly integrated PLL
solution that eliminates the need for external VCXO
and loop filter components. The DSPLL loop bandwidth
is digitally programmable, providing jitter performance
optimization at the application level. Operating from a
single 1.8 or 2.5 V supply, the Si5365 is ideal for
providing clock multiplication in high performance
timing applications.
Features
Selectable output frequencies ranging from 19.44 to
1050 MHz
Low jitter clock outputs w/jitter generation as low as
0.6 ps rms (50 kHz–80 MHz)
Integrated loop filter with selectable loop bandwidth
(30 kHz to 1.3 MHz)
Four clock inputs w/manual or automatically
controlled hitless switching
Five clock outputs with selectable signal format
(LVPECL, LVDS, CML, CMOS)
Support for ITU G.709 FEC ratios (255/238,
255/237, 255/236)
LOS alarm outputs
Digitally-controlled output phase adjust
Pin-programmable settings
On-chip voltage regulator for 1.8 or 2.5 V ±10%
operation
Small size: 14 x 14 mm 100-pin TQFP
Pb-free, RoHS compliant
Applications
SONET/SDH OC-48/OC-192 line cards
GbE/10GbE, 1/2/4/8/10GFC line cards
ITU G.709 line cards
Test and measurement
CKIN1
CKIN2
CKIN3
CKIN4
÷ N31
÷ N32
÷ N33
÷ N34
÷ N2
÷ NC3
CKOUT3
÷ NC1
CKOUT1
DSPLL
®
÷ NC2
CKOUT2
Divider Select
Manual/Auto Switch
Clock Select
LOS/FOS Alarms
Frequency Select
Bandwidth Select
Control
÷ NC5
CKOUT5
VDD (1.8 or 2.5 V)
GND
÷ NC4
CKOUT4
Preliminary Rev. 0.34 3/07
Copyright © 2007 by Silicon Laboratories
Si5365
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.