SiM3C1xx
Table 3.19. Absolute Maximum Ratings (Continued)
Parameter
Symbol
Conditions
Min
Max
Units
Voltage on I/O pins, Port Bank 3 I/O
V
SiM3C1x7, PB3.0–
V
V
V
–0.3
5.8
V
IN
SS
SS
SS
PB3.7, V > 3.3 V
IO
SiM3C1x7, PB3.0–
–0.3
–0.3
V +2.5
V
V
IO
PB3.7, V < 3.3 V
IO
SiM3C1x7, PB3.8 -
PB3.11
Lowest of
V +2.5,
IO
V
+0.3,
REGIN
or 5.8
SiM3C1x6, PB3.0–
V
V
V
–0.3
–0.3
–0.3
5.8
V
V
V
SS
SS
SS
PB3.5, V > 3.3 V
IO
SiM3C1x6, PB3.0–
V +2.5
IO
PB3.5, V < 3.3 V
IO
Lowest of
SiM3C1x6, PB3.6–
PB3.9
V +2.5,
IO
V
+0.3,
REGIN
or 5.8
SiM3C1x4, PB3.0–
PB3.3
V
–0.3
Lowest of
V
SS
V +2.5,
IO
V
+0.3,
REGIN
or 5.8
Total Current Sunk into Supply Pins
I
V
, V
, V , V
IOHD
—
400
—
mA
mA
SUPP
DD
REGIN
IO
Total Current Sourced out of Ground
Pins
I
V
V
400
VSS
SS, SSHD
Current Sourced or Sunk by Any I/O
Pin
I
PB0, PB1, PB2, PB3,
and RESET
–100
100
mA
PIO
PB4
–300
–100
300
100
mA
mA
Current Injected on Any I/O Pin
Total Injected Current on I/O Pins
I
PB0, PB1, PB2, PB3,
and RESET
INJ
PB4
–300
–400
300
400
mA
mA
I
Sum of all I/O and
RESET
INJ
*Note: VSS and VSSHD provide separate return current paths for device supplies, but are not isolated. They must always be
connected to the same potential on board.
Preliminary Rev. 0.8
29
SILICON [ SILICON ]
