Si
I
2022
Fibre Channel SerDes
Si
I
2022
Tx[0:9]
Tx+
Input
Latch
Serializer
Tx-
1.0625/2.125 Gbps
transmit signal
Tx_RATE
TBC
Tx
PLL
Loop-back
REFCLK[0:1]
Rx
PLL
RBC_SYNC
Rx_RATE
RBC[0:1]
SiI 2022 Features
Fibre Channel SerDes
Rx[0:9]
Data
Output
Byte
Sync
Deserializer
Rx+
Sampler
Rx-
1.0625/2.125 Gbps
receive signal
COM_DET
EN_CDET
• Fibre Channel-compliant
• Multi-rate: 1.0625 Gbps and
2.125 Gbps
Low Power
• Single 3.3V supply for core circuits
and high-speed I/O
• Power dissipation: 450 mW
Highly Reliable Serial
Interface
Cost Effective
• Standard CMOS technology
• Compact 64-pin, 14x14mm MQFP
(Metric Quad Flat Pack)
Narrow Parallel I/O
Interface
• Separately selectable Tx and Rx
data rates
• Very-low-jitter PLL: 3.3 ps (random
jitter), 32 ps (deterministic jitter)
• Variable pre-emphasis control
• Variable on-chip termination resistor
• Full ESD tolerance to 2 kV
• MSL
TM
-based technology proven
with PanelLink
®
ICs for the PC and
CE markets (2-5 Gbps, over 30M
units shipped)
• Robust design for "noisy"
environments
• 10-bit interface with DDR for
2.125 Gbps mode
• SSTL_2 and High-Speed Parallel
Interface (HSPI)-compliant
• Separate transmit byte clock (TBC)
for latching parallel input data
Proven Technology
Part Number - SiI2022CM64
Silicon Image, Inc.
1060 E. Arques, Sunnyvale, CA 94085
T 408.616.4000 F 408.830.9530
www.siliconimage.com
©2002 Silicon Image, Inc. All rights reserved. Silicon Image, the Silicon Image logo, MSL, SiI, SiI 2022, SiI 2023,
and PanelLink are trademarks or registered trademarks of Silicon Image, Inc. in the United States and other
countries. Product specifications are subject to change without notice. Printed in the U.S.A. 6/02 SiI-PB-0028
EWRAP
Rx_LOS
General
SILICONIMAGE [ Silicon image ]
